FPGA Implementation AES for CCM Mode Encryption Using Xilinx Spartan-II

This paper discusses a possible FPGA implementation of the AES algorithm specifically for the use in CCM Mode Encryption. CCM Mode encryption is a proposed standard to be used and the security backbone behind the new IEEE Std. 802.11i. CCM currently spends most the computation power performing the AES algorithm. This paper investigate the possibility of creating an off-chip AES system for CCM so that the process can be speed up. The implementation was done on Xilinx Spartan IIE, running on 50MHz platform.