Electrothermal Characterization in 3-D Resistive Random Access Memory Arrays
暂无分享,去创建一个
Yandong Luo | Wen-Yan Yin | Wenchao Chen | Mingzhuo Cheng | Wenchao Chen | W. Yin | Yandong Luo | M. Cheng
[1] Armando Rúa,et al. Insulator-to-metal phase transition and recovery processes in V O 2 thin films after femtosecond laser excitation , 2007 .
[2] Shimeng Yu,et al. Metal–Oxide RRAM , 2012, Proceedings of the IEEE.
[3] Daniele Ielmini,et al. Filament diffusion model for simulating reset and retention processes in RRAM , 2011 .
[4] Kuk-Hwan Kim,et al. Crossbar RRAM Arrays: Selector Device Requirements During Read Operation , 2014, IEEE Transactions on Electron Devices.
[5] U. Chung,et al. Modeling for multilevel switching in oxide-based bipolar resistive memory , 2012, Nanotechnology.
[6] Jiantao Zhou,et al. Crossbar RRAM Arrays: Selector Device Requirements During Write Operation , 2014, IEEE Transactions on Electron Devices.
[7] W. Lu,et al. High-density Crossbar Arrays Based on a Si Memristive System , 2008 .
[8] D. Ielmini,et al. Complementary switching in metal oxides: Toward diode-less crossbar RRAMs , 2011, 2011 International Electron Devices Meeting.
[9] Jordi Suñé,et al. Voltage and Power-Controlled Regimes in the Progressive Unipolar RESET Transition of HfO2-Based RRAM , 2013, Scientific Reports.
[10] Nigel A. Marks,et al. Experimental and atomistic modeling study of ion irradiation damage in thin crystals of theTiO2polymorphs , 2008 .
[11] 刘明,et al. Thermal crosstalk in 3-dimensional RRAM crossbar array , 2015 .
[12] Chang Jung Kim,et al. Physical electro-thermal model of resistive switching in bi-layered resistance-change memory , 2013, Scientific Reports.
[13] Shimeng Yu,et al. HfOx-based vertical resistive switching random access memory suitable for bit-cost-effective three-dimensional cross-point architecture. , 2013, ACS nano.
[14] Qi Liu,et al. Demonstration of 3D vertical RRAM with ultra low-leakage, high-selectivity and self-compliance memory cells , 2015, 2015 IEEE International Electron Devices Meeting (IEDM).
[15] Sannian Song,et al. Reduced Threshold Current in NbO2 Selector by Engineering Device Structure , 2014, IEEE Electron Device Letters.
[16] C. Hwang,et al. The conical shape filament growth model in unipolar resistance switching of TiO2 thin film , 2009 .
[17] Seungmin Lee,et al. Thermal conductivity of κ-Al2O3 and α-Al2O3 wear-resistant coatings , 1998 .
[18] S. Balatti,et al. Resistive Switching by Voltage-Driven Ion Migration in Bipolar RRAM—Part II: Modeling , 2012, IEEE Transactions on Electron Devices.
[19] J. W. Thomas. Numerical Partial Differential Equations: Finite Difference Methods , 1995 .
[20] Doo Seok Jeong,et al. A Review of Three‐Dimensional Resistive Switching Cross‐Bar Array Memories from the Integration and Materials Property Points of View , 2014 .
[21] Jing Guo,et al. Electrothermal Investigation on Vertically Aligned Single-Walled Carbon Nanotube Contacted Phase-Change Memory Array for 3-D ICs , 2015, IEEE Transactions on Electron Devices.
[22] D. Ielmini,et al. Trade-off between data retention and reset in NiO RRAMS , 2010, 2010 IEEE International Reliability Physics Symposium.
[23] Kp McKenna,et al. Electronic and magnetic properties of the cation vacancy defect in m − HfO 2 , 2015 .
[24] Shinhyun Choi,et al. Comprehensive physical model of dynamic resistive switching in an oxide memristor. , 2014, ACS nano.
[25] P. McIntyre,et al. Thermal Properties of Ultrathin Hafnium Oxide Gate Dielectric Films , 2009, IEEE Electron Device Letters.
[26] D. J. Attard,et al. Experimental and Atomistic Modelling Study of Ion Irradiation Damage in Thin Crystals of the TiO 2 Polymorphs , 2008 .
[27] R. Lukaszew,et al. Effect of inhomogeneities and substrate on the dynamics of the metal-insulator transition in VO 2 thin films , 2015, 1504.05954.
[28] Su Liu,et al. Physical model of dynamic Joule heating effect for reset process in conductive-bridge random access memory , 2014 .
[29] Kinam Kim,et al. A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O(5-x)/TaO(2-x) bilayer structures. , 2011, Nature materials.
[30] D. Ielmini,et al. Physical models of size-dependent nanofilament formation and rupture in NiO resistive switching memories , 2011, Nanotechnology.
[31] Shimeng Yu,et al. Compact Modeling of Conducting-Bridge Random-Access Memory (CBRAM) , 2011, IEEE Transactions on Electron Devices.
[32] Wenchao Lu,et al. Read Challenges in Crossbar Memories With Nanoscale Bidirectional Diodes and ReRAM Devices , 2015, IEEE Transactions on Nanotechnology.
[33] S. Ambrogio,et al. Analytical Modeling of Oxide-Based Bipolar Resistive Memories and Complementary Resistive Switches , 2014, IEEE Transactions on Electron Devices.
[34] T. Heinzel,et al. Dynamics of hydrogen sensing with Pt/TiO2 Schottky diodes , 2013 .
[35] Lee,et al. Thermal conductivity of sputtered oxide films. , 1995, Physical review. B, Condensed matter.
[36] Yue Bai,et al. Study of Multi-level Characteristics for 3D Vertical Resistive Switching Memory , 2014, Scientific reports.
[37] Ru Huang,et al. Encapsulation layer design and scalability in encapsulated vertical 3D RRAM , 2016, Nanotechnology.
[38] Tuo-Hung Hou,et al. Flexible One Diode--One Resistor Crossbar Resistive-Switching Memory , 2012 .
[39] H-S Philip Wong,et al. Memory leads the way to better computing. , 2015, Nature nanotechnology.
[40] Rainer Waser,et al. Complementary resistive switches for passive nanocrossbar memories. , 2010, Nature materials.
[41] S. Long,et al. An in-depth simulation study of thermal reset transitions in resistive switching memories , 2013 .
[42] Jun Yeong Seok,et al. Understanding structure-property relationship of resistive switching oxide thin films using a conical filament model , 2010 .
[43] Z. Ren. Nanoscale MOSFETS: Physics, Simulation and Design , 2006 .
[44] J Joshua Yang,et al. Memristive devices for computing. , 2013, Nature nanotechnology.
[45] Shimeng Yu,et al. Resistive Random Access Memory (RRAM) , 2016, Resistive Random Access Memory.
[46] Steve S. Chung,et al. Fully CMOS compatible 3D vertical RRAM with self-aligned self-selective cell enabling sub-5nm scaling , 2016, 2016 IEEE Symposium on VLSI Technology.