Formal control techniques for power-performance management
暂无分享,去创建一个
[1] Ulrich Kremer,et al. The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction , 2003, PLDI '03.
[2] Diana Marculescu. On the Use of Microarchitecture-Driven Dynamic Voltage Scaling , 2000 .
[3] Michael L. Scott,et al. Profile-based dynamic voltage and frequency scaling for a multiple clock domain microprocessor , 2003, ISCA '03.
[4] Margaret Martonosi,et al. XTREM: a power simulator for the Intel XScale® core , 2004, LCTES '04.
[5] A. TUSTIN,et al. Automatic Control Systems , 1950, Nature.
[6] Emil Talpes,et al. A critical analysis of application-adaptive multiple clock processors , 2003, ISLPED '03.
[7] Kevin Skadron,et al. Control-theoretic dynamic frequency and voltage scaling , 2002 .
[8] DAVID G. KENDALL,et al. Introduction to Mathematical Statistics , 1947, Nature.
[9] Margaret Martonosi,et al. Voltage and frequency control with adaptive reaction time in multiple-clock-domain processors , 2005, 11th International Symposium on High-Performance Computer Architecture.
[10] Kevin Skadron,et al. Control-theoretic techniques and thermal-RC modeling for accurate and localized dynamic thermal management , 2002, Proceedings Eighth International Symposium on High Performance Computer Architecture.
[11] Sharad Malik,et al. Orion: a power-performance simulator for interconnection networks , 2002, MICRO.
[12] Kevin Skadron,et al. Control-theoretic dynamic frequency and voltage scaling for multimedia workloads , 2002, CASES '02.
[13] Margaret Martonosi,et al. Formal online methods for voltage/frequency control in multiple clock domain microprocessors , 2004, ASPLOS XI.
[14] Margaret Martonosi,et al. Wattch: a framework for architectural-level power analysis and optimizations , 2000, Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201).
[15] Michael L. Scott,et al. Dynamic frequency and voltage control for a multiple clock domain microarchitecture , 2002, MICRO.
[16] Alan Jay Smith,et al. Improving dynamic voltage scaling algorithms with PACE , 2001, SIGMETRICS '01.
[17] Margaret Martonosi,et al. Coordinated, distributed, formal energy management of chip multiprocessors , 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..
[18] Diana Marculescu,et al. Power efficiency of voltage scaling in multiple clock, multiple voltage cores , 2002, ICCAD 2002.
[19] Margaret Martonosi,et al. Hardware-modulated parallelism in chip multiprocessors , 2005, CARN.
[20] Michael L. Scott,et al. Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling , 2002, Proceedings Eighth International Symposium on High Performance Computer Architecture.
[21] Anish Muttreja,et al. Automated Energy/Performance Macromodeling of Embedded Software , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[22] Karl Johan Åström,et al. Adaptive Control , 1989, Embedded Digital Control with Microcontrollers.
[23] Sharad Malik,et al. Compile-time dynamic voltage scaling settings: opportunities and limits , 2003, PLDI '03.
[24] Todd M. Austin,et al. The SimpleScalar tool set, version 2.0 , 1997, CARN.
[25] Anish Muttreja,et al. Hybrid simulation for embedded software energy estimation , 2005, Proceedings. 42nd Design Automation Conference, 2005..