IAMEM: Interaction-Aware Memory Energy Management

Energy efficiency has become one of the most important factors in the development of computer systems. As applications become more data centric and put more pressure on the memory subsystem, managing energy consumption of main memory is becoming critical. Therefore, it is critical to take advantage of all memory idle times by placing memory in low power modes even during the active process execution. However, current solutions only offer energy optimizations on a perprocess basis and are unable to take advantage of memory idle times when the process is executing. To allow accurate and fine-grained memory management during the process execution, we propose Interaction-Aware Memory Energy Management (IAMEM). IAMEM relies on accurate correlation of user-initiated tasks with the demand placed on the memory subsystem to accurately predict power state transitions for maximal energy savings while minimizing the impact on performance. Through detailed trace-driven simulation, we show that IAMEM reduces the memory energy consumption by as much as 16% as compared to the state-of-the-art approaches, while maintaining the user-perceivable performance comparable to the system without any energy optimizations.

[1]  Joonwon Lee,et al.  PABC: Power-Aware Buffer Cache Management for Low Power Consumption , 2007, IEEE Transactions on Computers.

[2]  Mingsong Bi,et al.  Interaction-aware energy management for wireless network cards , 2008, SIGMETRICS '08.

[3]  Kang G. Shin,et al.  Design and Implementation of Power-Aware Virtual Memory , 2003, USENIX ATC, General Track.

[4]  Mahmut T. Kandemir,et al.  Hardware and Software Techniques for Controlling DRAM Power Modes , 2001, IEEE Trans. Computers.

[5]  Xiaodong Li,et al.  Performance directed energy management for main memory and disks , 2004, ASPLOS XI.

[6]  Xiaodong Li,et al.  Performance directed energy management for main memory and disks , 2005, ACM Trans. Storage.

[7]  Carla Schlatter Ellis,et al.  Memory controller policies for DRAM power management , 2001, ISLPED '01.

[8]  Ben Shneiderman,et al.  Designing the User Interface: Strategies for Effective Human-Computer Interaction , 1998 .

[9]  Kang G. Shin,et al.  Improving energy efficiency by making DRAM less randomly accessed , 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..

[10]  Alan Jay Smith,et al.  Using user interface event information in dynamic voltage scaling algorithms , 2002, 11th IEEE/ACM International Symposium on Modeling, Analysis and Simulation of Computer Telecommunications Systems, 2003. MASCOTS 2003..

[11]  Yuanyuan Zhou,et al.  DMA-aware memory energy management , 2006, The Twelfth International Symposium on High-Performance Computer Architecture, 2006..

[12]  Robert B. Miller,et al.  Response time in man-computer conversational transactions , 1899, AFIPS Fall Joint Computing Conference.

[13]  Kang G. Shin,et al.  Software-Hardware Cooperative Power Management for Main Memory , 2004, PACS.

[14]  Jock D. Mackinlay,et al.  The information visualizer, an information workspace , 1991, CHI.

[15]  Alok N. Choudhary,et al.  An integrated approach to reducing power dissipation in memory hierarchies , 2002, CASES '02.

[16]  Ran Duan,et al.  Delay-Hiding energy management mechanisms for DRAM , 2010, HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture.

[17]  Alvin R. Lebeck,et al.  Power aware page allocation , 2000, SIGP.

[18]  Mingsong Bi,et al.  IADVS: On-demand performance for interactive applications , 2010, HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture.

[19]  Karthick Rajamani,et al.  Energy Management for Commercial Servers , 2003, Computer.

[20]  Mahmut T. Kandemir,et al.  Scheduler-based DRAM energy management , 2002, DAC '02.