Top Down Approach: SIMULINK Mixed Hardware / Software Design

System-level design methodologies have been introduced as a solution to handle the design complexity of mixed Hardware / Software systems. In this paper we describe a system-level design flow starting from Simulink specification, focusing on concurrent hardware and software design and verification at four different

[1]  Nacer-Eddine Zergainoh,et al.  Matlab based environment for designing DSP systems using IP blocks , 2004 .

[2]  Alberto L. Sangiovanni-Vincentelli,et al.  System-level design: orthogonalization of concerns andplatform-based design , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  René Cumplido,et al.  A high-performance processor for embedded real-time control , 2005, IEEE Transactions on Control Systems Technology.

[4]  Damien Lyonnard,et al.  Colif: A Design Representation for Application-Specific Multiprocessor SOCs , 2001, IEEE Des. Test Comput..

[5]  Nacer-Eddine Zergainoh,et al.  Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems , 2006, EURASIP J. Adv. Signal Process..

[6]  Nacer-Eddine Zergainoh,et al.  Simulink-based MPSoC Design: New Approach to Bridge the Gap between Algorithm and Architecture Design , 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).

[7]  J. Madsen,et al.  A system-level multiprocessor system-on-chip modeling framework , 2004, 2004 International Symposium on System-on-Chip, 2004. Proceedings..

[8]  Amer Baghdadi,et al.  Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[9]  Sudeep Pasricha,et al.  Using TLM for exploring bus-based SoC communication architectures , 2005, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05).

[10]  Nacer-Eddine Zergainoh,et al.  Automatic delay correction method for IP block-based design of VLSI dedicated digital signal processing systems: theoretical foundations and implementation , 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[11]  Stephen A. Edwards,et al.  The challenges of hardware synthesis from C-like languages , 2005, Design, Automation and Test in Europe.

[12]  Andy D. Pimentel,et al.  A systematic approach to exploring embedded system architectures at multiple abstraction levels , 2006, IEEE Transactions on Computers.

[13]  Bo Zhou,et al.  An operating system framework for reconfigurable systems , 2005, The Fifth International Conference on Computer and Information Technology (CIT'05).