论文信息 - Improved force-directed scheduling

Improved force-directed scheduling

Presents a mathematical justification of the technique of force-directed scheduling and propose two modifications of the basic algorithm introduced by Paulin and Knight. The newly presented modifications improve the effectiveness of force-directed scheduling without affecting its time complexity. This is illustrated by an empirical performance analysis based on a number of problem instances.<<ETX>>

Emile H. L. Aarts | Jan H. M. Korst | Wim F. J. Verhaegh | Paul E. R. Lippens

[1] Alice C. Parker,et al. Tutorial on high-level synthesis , 1988, DAC '88.

[2] Donald E. Thomas,et al. The combination of scheduling, allocation, and mapping in a single algorithm , 1991, DAC '90.

[3] T. Kailath,et al. VLSI and Modern Signal Processing , 1984 .

[4] Jos Huisken,et al. PHIDEO: a silicon compiler for high speed algorithms , 1991, Proceedings of the European Conference on Design Automation..

[5] David S. Johnson,et al. Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .

[6] Thomas Kailath,et al. Modern signal processing , 1985 .

[7] Pierre G. Paulin,et al. Force-Directed Scheduling in Automatic Data Path Synthesis , 1987, 24th ACM/IEEE Design Automation Conference.

[8] Gabrièle Saucier,et al. Logic and architecture synthesis for silicon compilers : proceedings of the International Workshop on Logic and Architecture Synthesis for Silicon Compilers held in Grenoble, France, 25-27 May 1988 , 1989 .

[9] Gaetano Borriello,et al. High-level synthesis: current status and future directions , 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..

[10] Pierre G. Paulin,et al. Force-directed scheduling for the behavioral synthesis of ASICs , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..