External Latchup Risks and Prevention Solutions in Advanced Bulk FinFET Technology

Internal Latchup (ILU) and External Latchup (ELU) are studied in advanced bulk FinFET technology. ELU risks of thin oxide (SG) and thick oxide (EG) devices are assessed and discussed. In this work we present different design techniques which designers can use to eliminate ELU risks in their designs.

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