Placement of Hardware Tasks on FPGA using the Bees Algorithm

The dynamic and partial reconfiguration in FPGA with heterogeneous resources is a challenge for the next years. It allows reconfiguring a specific hardware zone in FPGA while maintaining the activity of the remaining circuit’s part. This paper introduces a new approach about how to solve the problem of placement of the hardware tasks on the recent reconfigurable technology using the honey Bees Algorithm. This approach aims at performing a good placement by maximizing the efficiency of the used resources and reducing the task’s reconfiguration overheads. Experimental results show that the proposed method can perform a good placement of hardware tasks on the device by optimizing significantly the parameters of the cost function in terms of resources and execution time.