Implementation of fixed DSP functions using the reduced coefficient multiplier

Distributed arithmetic (DA) has been successfully applied to the design of area efficient multipliers on FPGAs for DSP applications. Whilst DA is efficient in applications where the coefficients are fixed, there is little option for applications with a limited range of coefficient values. This paper describes a technique for developing area efficient multipliers for a range of DSP applications that fall into this category. This is accomplished by employing multiplexers at no extra cost to increase the functionality of existing fixed coefficient multipliers. The technique has been applied to a DCT FPGA implementation where an area decrease of up to 50% and a speed increase of 33% was achieved over the conventional route.

[1]  Miodrag Potkonjak,et al.  Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  John V. McCanny,et al.  Discrete cosine transform generator for VLSI synthesis , 1998, Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98 (Cat. No.98CH36181).

[3]  Wayne Luk,et al.  Automating production of run-time reconfigurable designs , 1998, Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251).

[4]  Roger F. Woods,et al.  An investigation of reconfigurable multipliers for use in adaptive signal processing , 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).

[5]  Hsieh S. Hou,et al.  The Fast Hartley Transform Algorithm , 1987, IEEE Transactions on Computers.

[6]  Roger F. Woods,et al.  Applying an XC6200 to Real-Time Image Processing , 1998, IEEE Des. Test Comput..

[7]  C.N. Ang,et al.  Virtex FPGA implementation of a polyphase filter for sample rate conversion , 2000, Conference Record of the Thirty-Fourth Asilomar Conference on Signals, Systems and Computers (Cat. No.00CH37154).