T: a multithreaded massively parallel architecture

What should the architecture of each node in a general purpose, massively parallel architecture (MPA) be? We frame the question in concrete terms by describing two fundamental problems that must be solved well in any general purpose MPA. From this, we systematically develop the required logical organization of an MPA node, and present some details of *T (pronounced Start, a concrete architecture designed to these requirements. *T is a direct descendant of dynamic dataflow architectures, and unifies them with von Neumann architectures. We discuss a hand-compiled example and some compilation issues.

[1]  David E. Culler,et al.  Fine-grain parallelism with minimal hardware support: a compiler-controlled threaded abstract machine , 1991, ASPLOS IV.

[2]  David E. Culler,et al.  The Explicit Token Store , 1990, J. Parallel Distributed Comput..

[3]  Kattamuri Ekanadham,et al.  Incorporating Data Flow Ideas into von Neumann Processors for Parallel Execution , 1987, IEEE Transactions on Computers.

[4]  Toshitsugu Yuba,et al.  The SIGIMA-1 Dataflow Supercomputer:A Challenge for New Generation Supercomputing Systems , 1988 .

[5]  Ian Watson,et al.  The Manchester prototype dataflow computer , 1985, CACM.

[6]  Guang R. Gao,et al.  An efficient pipelined dataflow processor architecture , 1988, Proceedings. SUPERCOMPUTING '88.

[7]  Robert A. Iannucci Toward a dataflow/von Neumann hybrid architecture , 1988, ISCA '88.

[8]  B J Smith,et al.  A pipelined, shared resource MIMD computer , 1986 .

[9]  Rishiyur S. Nikhil,et al.  Can Dataflow Subsume Von Neumann Computing? , 1989, The 16th Annual International Symposium on Computer Architecture.

[10]  Rishiyur S. Nikhil The Parallel Programming Language Id and its Compilation for Parallel Machines , 1993, Int. J. High Speed Comput..

[11]  Peter M. Maurer Mapping the Data Flow Model of Computation into an Enhanced Von Neumann Processor , 1988, ICPP.

[12]  Anant Agarwal,et al.  APRIL: a processor architecture for multiprocessing , 1990, ISCA '90.

[13]  Kenneth R. Traub,et al.  Multithreading: a revisionist view of dataflow architectures , 1991, ISCA '91.

[14]  Allan Gottlieb,et al.  Highly parallel computing , 1989, Benjamin/Cummings Series in computer science and engineering.

[15]  T. Yuba,et al.  An architecture of a dataflow single chip processor , 1989, ISCA '89.

[16]  Kevin P. McAuliffe,et al.  The IBM Research Parallel Processor Prototype (RP3): Introduction and Architecture , 1985, ICPP.

[17]  David E. Culler,et al.  Dataflow architectures , 1986 .

[18]  V. G. Grafe,et al.  The Epsilon dataflow processor , 1989, ISCA '89.

[19]  Tetsuya Fujita,et al.  A Multithreaded Processor Architecture for Parallel Symbolic Computation. , 1987 .

[20]  David E. Culler,et al.  Fine-grain parallelism with minimal hardware support: a compiler-controlled threaded abstract machine , 1991, ASPLOS IV.

[21]  Allan Porterfield,et al.  The Tera computer system , 1990, ICS '90.

[22]  Anoop Gupta,et al.  The directory-based cache coherence protocol for the DASH multiprocessor , 1990, ISCA '90.

[23]  Arvind,et al.  Executing a Program on the MIT Tagged-Token Dataflow Architecture , 1990, IEEE Trans. Computers.

[24]  Anoop Gupta,et al.  The directory-based cache coherence protocol for the DASH multiprocessor , 1990, [1990] Proceedings. The 17th Annual International Symposium on Computer Architecture.

[25]  Robert H. Halstead,et al.  MASA: a multithreaded processor architecture for parallel symbolic computing , 1988, [1988] The 15th Annual International Symposium on Computer Architecture. Conference Proceedings.

[26]  Gregory M. Papadopoulus,et al.  Implementation of a general-purpose dataflow multiprocessor , 1991, Research monographs in parallel and distributed computing.

[27]  Gregory M. Papadopoulos,et al.  Implementation of a general purpose dataflow multiprocessor , 1991 .

[28]  David E. Culler,et al.  Compiler-Controlled Multithreading for Lenient Parallel Languages , 1991, FPCA.

[29]  Allan Porterfield,et al.  The Tera computer system , 1990 .

[30]  Toshitsugu Yuba,et al.  An Architecture Of A Dataflow Single Chip Processor , 1989, The 16th Annual International Symposium on Computer Architecture.

[31]  Arvind,et al.  Two Fundamental Issues in Multiprocessing , 1987, Parallel Computing in Science and Engineering.