A Novel Volt-Second Self-Balancing SVPWM Scheme to Eliminate Steady-State DC Bias for a Three-Phase Isolated AC–DC Matrix Converter

For a three-phase isolated ac-dc matrix converter, the slight volt-second imbalance caused by variable input voltage is an inherent defect and has been neglected in most PWM schemes. The analysis in this paper shows that the imbalance lies in a single direction during the entire input cycle, and it might generate a large dc bias to severely decrease the efficiency of the steady-state operation. Therefore, the imbalance phenomenon is first investigated, and the generation mechanism of the steady-state dc bias is derived in detail. To eliminate such a dc bias, a novel transformer primary-side voltage pulse is originally defined. Based on the special crisscrossing operation mode with the above pulse, a simple but effective four-segment space vector PWM (4S-SVPWM) scheme is proposed. Compared with the conventional more-segment SVPWM schemes, the novel 4S-SVPWM scheme can achieve volt-second self-balancing without auxiliary methods, as well as a 1/2 reduction in the common-mode voltage (CMV) peak value and a 1/3 reduction in the switching actions. The overall efficiency and power density of the converter are greatly improved. Finally, an experimental prototype is built to validate the correctness and effectiveness of the novel scheme.