Compile-time and instruction-set methods for improving floating- to fixed-point conversion accuracy
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[1] Corinna G. Lee,et al. Software pipelining loops with conditional branches , 1996, Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29.
[2] Heinrich Meyr,et al. FRIDGE: an interactive code generation environment for HW/SW codesign , 1997, 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing.
[3] Scott A. Bortoff. Approximate state-feedback linearization using spline functions , 1997, Autom..
[4] Seehyun Kim,et al. A floating-point to fixed-point assembly program translator for the TMS 320C25 , 1994 .
[5] Leland B. Jackson,et al. On the interaction of roundoff noise and dynamic range in digital filters , 1970, Bell Syst. Tech. J..
[6] François Charot,et al. Automatic floating-point to fixed-point conversion for DSP code generation , 2002, CASES '02.
[7] K. Sundaramoorthy,et al. Slipstream processors: improving both performance and fault tolerance , 2000, SIGP.
[8] Keshab K. Parhi,et al. Scaled normalized lattice digital filter structures , 1995 .
[9] Eric Rotenberg,et al. Slipstream processors: improving both performance and fault tolerance , 2000, SIGP.
[10] Sean Hsien-en Peng,et al. UTDSP, a VLIW programmable DSP processor , 2000 .
[11] SungWonyong,et al. Combined word-length optimization and high-level synthesis of digital signal processing systems , 2006 .
[12] A. Oppenheim,et al. Realization of digital filters using block-floating-point arithmetic , 1970 .
[13] Wonyong Sung,et al. AUTOSCALER for C: an optimizing floating-point to integer C program converter for fixed-point digital signal processors , 2000 .
[14] Tor M. Aamodt. Floating-point to fixed-point compilation and embedded architectural support , 2001 .
[15] S. Hwang. Minimum uncorrelated unit noise in state-space digital filtering , 1977 .
[16] H. Spang,et al. Reduction of Quantizing Noise by Use of Feedback , 1962 .
[17] Clifford T. Mullis,et al. Synthesis of minimum roundoff noise fixed point digital filters , 1976 .
[18] Gurindar S. Sohi,et al. Master/slave speculative parallelization , 2002, MICRO.
[19] Wonyong Sung,et al. Combined word-length optimization and high-level synthesis ofdigital signal processing systems , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[20] L. Jackson. Roundoff-noise analysis for fixed-point digital filters realized in cascade or parallel form , 1970 .
[21] Mazen A. R. Saghir,et al. Application-Specific Instruction-Set Architectures for Embedded DSP Applications , 1998 .
[22] Wonyong Sung,et al. A floating-point to integer C converter with shift reduction for fixed-point digital signal processors , 1999, 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings. ICASSP99 (Cat. No.99CH36258).
[23] Gurindar S. Sohi,et al. Master/Slave Speculative Parallelization , 2002, 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings..
[24] Paul Chow,et al. Embedded ISA support for enhanced floating-point to fixed-point ANSI-C compilation , 2000, CASES '00.
[25] Seehyun Kim,et al. Fixed-point optimization utility for C and C++ based digital signal processing programs , 1998 .
[26] Paul Chow,et al. Application-driven design of DSP architectures and compilers , 1994, Proceedings of ICASSP '94. IEEE International Conference on Acoustics, Speech and Signal Processing.
[27] K. M. Anspach,et al. Minimization of fixed-point roundoff noise in extended state-space digital filters , 1996 .