AN EVOLUTIONARY-BASED ALGORITHM TO THE MODULE SELECTION PROCESS IN HIGH-LEVEL SYNTHESIS

This paper proposes a new module selection algorithm for high-level synthesis. The algorithm uses an evolutionary approach to find the modules configuration set that satisfies design timing constraints while minimizing the total design cost (area). The algorithm has been incorporated in a well-characterized design space exploration strategy that aims to help designers to systematically find efficient implementation(s) of their designs that meet the design constraints [1]. Incorporating module selection axis to the design space enable designers to evaluate large number of design alternatives by varying module selection and the latency or the resources required to implement the given design. We also present some experimental results for standard benchmarks to show the effectiveness of the algorithm.

[1]  Rajiv Jain MOSP: module selection for pipelined designs with multi-cycle operations , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[2]  T. Kailath,et al.  VLSI and Modern Signal Processing , 1984 .

[3]  David H. Wolpert,et al.  No free lunch theorems for optimization , 1997, IEEE Trans. Evol. Comput..

[4]  David B. Fogel,et al.  Evolutionary algorithms in theory and practice , 1997, Complex.

[5]  Azeddien M. Sllame,et al.  An efficient list-based scheduling algorithm for high-level synthesis , 2002, Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools.

[6]  I. Ahmad,et al.  Integrated scheduling, allocation and module selection for design-space exploration in high-level synthesis , 1995 .

[7]  Edwin Hsing-Mean Sha,et al.  Efficient design exploration based on module utility selection , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[8]  A. H. Timmer,et al.  Module selection and scheduling using unrestricted libraries , 1993, 1993 European Conference on Design Automation with the European Event in ASIC Design.

[9]  Hugo De Man,et al.  Combined hardware selection and pipelining in high-performance data-path design , 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  Daniel Gajski,et al.  Component selection for high-performance pipelines , 1996, IEEE Trans. Very Large Scale Integr. Syst..

[11]  Daniel D. Gajski,et al.  High ― Level Synthesis: Introduction to Chip and System Design , 1992 .

[12]  Daniel Gajski,et al.  Component selection in resource shared and pipelined DSP applications , 1996, Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition.

[13]  G. De Micheli,et al.  A module selection algorithm for high-level synthesis , 1991, 1991., IEEE International Sympoisum on Circuits and Systems.

[14]  Hugo De Man,et al.  Combined hardware selection and pipelining in high performance data-path design , 1990, Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors.