Local $V_{\rm th}$ Variability and Scalability in Silicon-on-Thin-BOX (SOTB) CMOS With Small Random-Dopant Fluctuation
暂无分享,去创建一个
N. Sugii | R. Tsuchiya | T. Ishigaki | Y. Morita | H. Yoshimoto | S. Kimura
[1] S. M. Sze,et al. Physics of semiconductor devices , 1969 .
[2] K. Steinhubl. Design of Ion-Implanted MOSFET'S with Very Small Physical Dimensions , 1974 .
[3] W. Fichtner,et al. Generalized guide for MOSFET miniaturization , 1980, IEEE Electron Device Letters.
[4] Ralph B. D'Agostino,et al. Goodness-of-Fit-Techniques , 2020 .
[5] M.J.M. Pelgrom,et al. Matching properties of MOS transistors , 1989 .
[6] Shinji Okazaki,et al. 0.1 mu m CMOS devices using low-impurity-channel transistors (LICT) , 1990, International Technical Digest on Electron Devices.
[7] K. F. Lee,et al. Scaling the Si MOSFET: from bulk to SOI to bulk , 1992 .
[8] Y. Tosaka,et al. Scaling theory for double-gate SOI MOSFET's , 1993 .
[9] C. Hu,et al. Threshold voltage model for deep-submicrometer MOSFETs , 1993 .
[10] A. Toriumi,et al. Experimental study of threshold voltage fluctuation due to statistical variation of channel dopant number in MOSFET's , 1994 .
[11] Yuan Taur,et al. Fundamentals of Modern VLSI Devices , 1998 .
[12] D. Frank,et al. Generalized scale length for two-dimensional effects in MOSFETs , 1998, IEEE Electron Device Letters.
[13] R.H. Dennard,et al. Design Of Ion-implanted MOSFET's with Very Small Physical Dimensions , 1974, Proceedings of the IEEE.
[14] T. Sugii,et al. Direct measurement of V/sub th/ fluctuation caused by impurity positioning , 2000, 2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104).
[15] K. Bult,et al. Analog design in deep sub-micron CMOS , 2000, Proceedings of the 26th European Solid-State Circuits Conference.
[16] T. Numata,et al. Experimental study on carrier transport mechanism in ultrathin-body SOI nand p-MOSFETs with SOI thickness less than 5 nm , 2002, Digest. International Electron Devices Meeting,.
[17] S. Maegawa,et al. Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[18] S. Ohkawa,et al. Analysis and characterization of device variations in an LSI chip using an integrated device matrix array , 2004 .
[19] Hiroo Masuda,et al. Design guide and process quality improvement for treatment of device variations in an LSI chip , 2004, Proceedings of the 2004 International Conference on Microelectronic Test Structures (IEEE Cat. No.04CH37516).
[20] K. Ohuchi,et al. Impact of BOX scaling on 30 nm gate length FD SOI MOSFET , 2005, 2005 IEEE International SOI Conference Proceedings.
[21] Tsai-Sheng Gau,et al. Novel 20nm hybrid SOI/bulk CMOS technology with 0.183/spl mu/m/sup 2/ 6T-SRAM cell by immersion lithography , 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..
[22] O. Faynot,et al. Multiple gate devices: advantages and challenges , 2005 .
[23] S. Sze,et al. Physics of Semiconductor Devices: Sze/Physics , 2006 .
[24] W. Fichtner,et al. Comprehensive design methodology of dopant profile to suppress gate-LER-induced threshold voltage variability in 20nm NMOSFETs , 2006, 2009 Symposium on VLSI Technology.
[25] R. Tsuchiya,et al. Low voltage (Vdd∼0.6 V) SRAM operation achieved by reduced threshold voltage variability in SOTB (silicon on thin BOX) , 2006, 2009 Symposium on VLSI Technology.
[26] T. Hiramoto,et al. Analysis of extra VT variability sources in NMOS using Takeuchi plot , 2006, 2009 Symposium on VLSI Technology.
[27] Joël Hartmann,et al. Towards a New Nanoelectronic Cosmology , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[28] T. Iwamatsu,et al. Controllable Inverter Delay and Suppressing Vth Fluctuation Technology in Silicon on Thin BOX Featuring Dual Back-Gate Bias Architecture , 2007, 2007 IEEE International Electron Devices Meeting.
[29] T. Hiramoto,et al. Impact of Parameter Variations and Random Dopant Fluctuations on Short-Channel Fully Depleted SOI MOSFETs With Extremely Thin BOX , 2007, IEEE Electron Device Letters.
[30] M. Yamaoka,et al. Low-voltage limitations of memory-rich nano-scale CMOS LSIs , 2007, ESSDERC 2007 - 37th European Solid State Device Research Conference.
[31] T. Ernst,et al. Localized SOI technology: an innovative Low Cost self-aligned process for Ultra Thin Si-film on thin BOX integration for Low Power applications , 2007, 2007 IEEE International Electron Devices Meeting.
[32] A. Asenov. Simulation of Statistical Variability in Nano MOSFETs , 2007, 2007 IEEE Symposium on VLSI Technology.
[33] T. Fukai,et al. Understanding Random Threshold Voltage Fluctuation by Comparing Multiple Fabs and Technologies , 2007, 2007 IEEE International Electron Devices Meeting.
[34] K. Takeuchi,et al. Analyses of 5σ Vth fluctuation in 65nm-MOSFETs using takeuchi plot , 2008, 2008 Symposium on VLSI Technology.
[35] O. Rozeau,et al. High immunity to threshold voltage variability in undoped ultra-thin FDSOI MOSFETs and its physical understanding , 2008, 2008 IEEE International Electron Devices Meeting.
[36] T. Iwamatsu,et al. Smallest Vth variability achieved by intrinsic silicon on thin BOX (SOTB) CMOS with single metal gate , 2008, 2008 Symposium on VLSI Technology.
[37] Nobuyuki Sugii,et al. Wide-Range Threshold Voltage Controllable Silicon on Thin Buried Oxide Integrated with Bulk Complementary Metal Oxide Semiconductor Featuring Fully Silicided NiSi Gate Electrode , 2008 .
[38] A. Asenov,et al. Origin of the Asymmetry in the Magnitude of the Statistical Variability of n- and p-Channel Poly-Si Gate Bulk MOSFETs , 2008, IEEE Electron Device Letters.
[39] R. Tsuchiya,et al. Comprehensive study on vth variability in silicon on Thin BOX (SOTB) CMOS with small random-dopant fluctuation: Finding a way to further reduce variation , 2008, 2008 IEEE International Electron Devices Meeting.
[40] Nobuyuki Sugii,et al. Evaluation of Threshold-Voltage Variation in Silicon on Thin Buried Oxide Complementary Metal–Oxide–Semiconductor and Its Impact on Decreasing Standby Leakage Current , 2009 .