An FPGA Robust Technology Mapping Method

A novel radiation-hard FPGA technology mapping method based on partial TMR and logic gate masking and a fast parallel fault injection and Monte Carlo simulation platform are presented.This platform and method have been used in the mapping module which is part of the CAD flow for self-developed FPGA by Fudan University named FDP4.The experimental results show that FDRMap can decrease the circuit fault criticality by 32.62% with the 14.06% area penalty.Comparing to the partial TMR,it decreases the criticality by 12.44% along with reducing the resources by 12.23%.