Performance Of Parallel Interference Cancellation Receiver With Delay Errors

| The performance of the multistage parallel interference cancellation (PIC) multiuser receiver for CDMA systems experiencing delay estimation errors is studied. The multistage parallel interference cancellation (PIC) receiver is among the most promising detectors for practical systems in third generation mobile wireless communications systems. The performance of the parallel interference cancellation receiver in fading channels has been studied previously in 1] and 2]. Especially the receiver sensitivity to channel estimation errors was studied in 3]. Here the delay estimation error sensitivity of the PIC receiver is studied in known and estimated fading multipath channels. The considered receiver structure is presented in Fig. 1. The multistage PIC block includes a conventional (RAKE) initial stage followed by two cancellation stages operating on the wideband sampled received signal. Thus, cancellation is performed prior to matched ltering. Channel estimation is assumed to be decision-directed (DD), utilizing the decisions of the last cancellation stage to remove the eeect of data modulation and decoupled LMMSE lters matched to channel autocorrelation and signal-to-noise ratio to suppress noise. A more detailed description can be found in 3]. Delay errors have two eeects in an interference cancellation receiver. In one hand, they result in a lower received energy after despreading. On the other hand, the residual multiple access interference (MAI) after cancellation is increased due to degraded delay estimates utilized in cancellation. The sensitivity of a PIC receiver to delay errors was studied by including an error process, following the zero-mean Gaussian distribution limited to the range of 1 chips, to the true propagation delays. All users are assumed to experience the same delay error having standard deviation , resulting in slightly pessimistic results in a near-far case. A near-far case is modeled with ve users being received at 10dB higher power than the others. Figure 2(a) presents the results showing robust behavior when both power control and channel estimation are ideal. Increased residual error results in performance degradation and a tighter requirement for delay errors in a near-far case (b), regardless of the ideal channel estimation. Rapid degradation is experienced when error standard deviation is above 0.05. The BER saturation , characteristic to the PIC receiver, is brought on at lower signal-to-noise ratios. Requirements for power control become an important factor when channel estimation is applied in the receiver. By observing Figures 2(c) and (d), the eeects of unideal power control, combined with channel estimation and delay errors, …