A method for optimizing a layout for a mask for use in semiconductor manufacturing

A method for optimizing a layout for a mask for use in semiconductor manufacturing, wherein the layout of the main structures and Scatterbars, having the following steps: (A) determining one or more of the main structures; (B) determining one or more of Scatterbars at predetermined intervals at least adjacent to a portion of one of the main structures; (C) performing an OPC of the main structures in consideration of the Scatterbars; (D) comparing the corrected main structures with the main structures prior to step (c); and (E) repeating steps (b) to (e) based on the corrected main structures in dependence on the comparison in step (d).