Design and implementation of a fixed-point radix-4 FFT optimized for local positioning in wireless sensor networks

Local positioning is becoming an attractive feature for wireless sensor networks due to the variety of the existing industrial applications. The focus of developing autonomous wireless sensor nodes with localization functionality is with the localization accuracy and range, energy efficiency and the size of the sensor nodes. In this context special attention is paid to the sensor digital signal processing, where the main task is to perform a Fast Fourier Transform (FFT). This paper presents a design of the radix-4 FFT algorithm and its optimization with respect to hardware implementation for local positioning systems. In order to reduce the hardware requirements a fixed-point approach has been chosen. The algorithm was implemented, optimized and verified on a FPGA before starting the chip design. For the special case of a 4096-point FFT processing core the design has been realized as an ASIC using IBM 130nm CMOS technology.

[1]  Qihui Zhang,et al.  A Low Area Pipelined FFT Processor for OFDM-Based Systems , 2009, 2009 5th International Conference on Wireless Communications, Networking and Mobile Computing.

[2]  F. Ellinger,et al.  Local Positioning for Wireless Sensor Networks , 2007, 2007 IEEE Globecom Workshops.

[3]  J. Tukey,et al.  An algorithm for the machine calculation of complex Fourier series , 1965 .

[4]  Takashi Miyazaki,et al.  Radix-4 FFT implementation using SIMD multimedia instructions , 1999, 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings. ICASSP99 (Cat. No.99CH36258).

[5]  In-Cheol Park,et al.  Area-efficient memory-based architecture for FFT processing , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[6]  Tun Zainal Azni Zulkifli,et al.  Design of 16-point Radix-4 Fast Fourier Transform in 0.18µm CMOS Technology , 2007 .

[7]  Xuemei Liu,et al.  The Design of Radix-4 FFT by FPGA , 2008, 2008 International Symposium on Intelligent Information Technology Application Workshops.

[8]  Keshab K. Parhi,et al.  An efficient pipelined FFT architecture , 2003 .

[9]  An-Yeu Wu,et al.  Implementation of a programmable 64/spl sim/2048-point FFT/IFFT processor for OFDM-based communication systems , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[10]  K. Schwarz,et al.  FFT implementation on DSP-chips-theory and practice , 1990, International Conference on Acoustics, Speech, and Signal Processing.

[11]  René de Jesús Romero-Troncoso,et al.  VHDL core for 1024-point radix-4 FFT computation , 2005, 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05).

[12]  Martin Vossiek,et al.  Wireless local positioning , 2003 .