A Survey of HW/SW Cosimulation Techniques and Tools

In the last decade, electronic systems have become increasingly complex. The number of func-tionalities built on one chip have risen enormously. To solve the problem of cost and flexibility for such sophisticated, systems the usage of mixed hardware software systems has increased. Due to the complexity, the system development has become more and more difficult and the simulation and evaluation has become a key position of the design process. Many tools which aid designers in the evaluation of electronic systems have been developed. However, until recently, tools for the simulation of mixed HW/SW systems have been lacking. An early approach to HW/SW co-design and cosimulation was presented by the University of California, Berkeley [8] in 1991 within their system design project Ptolemy. During the last years some vendors have begun offering tools to close this gap. In 1996, Mentor Graphics presented Seamless, a cosimulation tool that supports as a backplane the connection between the software execution and the hardware simulator. Competing products are EagleI and EagleV, which have been developed concurrently by Eagle Design Automation (now merged with Viewlogic). The Tima Lab at Institute National Polytechnique in Grenoble, France, developed in cooperation with SGS-Thomson, a VHDL/C cosimulation tool called CoSim [11] as a part of their co-design tool COSMOS. This paper surveys existing cosimulation tools and compares and contrasts their basic features and techniques. For example, commonly used communication mechanisms between HW and SW simulators and different processor models are introduced. The first chapter gives a brief overview of cosimulation and the co-design process in general. Chapter 2 surveys the fundamental tasks of cosimulation. Processor models and tool structures are considered in Chapter 3. A number of tools and descriptions of their implementation are presented in Chapter 4.