A 2 V 5.1-5.8 GHz image-reject receiver with wide dynamic range

A 5-6 GHz image-reject receiver IC implemented in 0.5 /spl mu/m 25 GHz silicon bipolar technology draws 20 mA from a 2 V supply. The image rejection obtainable with this IC is sufficient to eliminate the off-chip interstage RF filter in a heterodyne receiver, thereby simplifying packaging requirements and decreasing costs. The methods used here that make this design possible are: regenerative frequency doubling, I-Q phase error compensation and RF interstage coupling. Low-voltage circuit topologies are used throughout to minimize power consumption and ensure compatibility with deep sub-micron CMOS (baseband) ASICs operating from low-voltage supplies.

[1]  R. A. Hadaway,et al.  A 5.1-5.8 GHz low-power image-reject downconverter in SiGe technology , 1999, Proceedings of the 1999 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.99CH37024).

[2]  T. Drenski,et al.  A 5 GHz-band BiCMOS up/down-converter chip for GMSK modulation wireless systems , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[3]  J.R. Long,et al.  RF analog and digital circuits in SiGe technology , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

[4]  H. Ainspan,et al.  A 5.2 GHz 3.3 V I/Q SiGe RF transceiver , 1999, Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327).