PAWiS: TOWARDS A POWER AWARE SYSTEM ARCHITECTURE FOR A SoC/SiP WIRELESS SENSOR AND ACTOR NODE IMPLEMENTATION

Abstract The goal of the PAWiS project is to develop both, efficient system architectures and the related design methodology for power aware wireless sensor and actor network nodes that allow for capturing inefficiencies in every aspect of the system. These aspects include all layers of the communication system, the targeted class of the application itself, the power supply and energy management, the digital processing unit and the sensor-actor interface. The proof of concept will be based on a prototype system that allows a future integration in a single SiP/SoC. The project is supported by Infineon Austria and started only recently, therefore the main focus of this paper is on the design approach.

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