IPSec implementation on Xilinx Virtex-II Pro FPGA and its application
暂无分享,去创建一个
[1] John W. Lockwood,et al. A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks , 2004, FPL.
[2] Patrick Schaumont,et al. Design and performance testing of a 2.29-GB/s Rijndael processor , 2003, IEEE J. Solid State Circuits.
[3] John W. Lockwood,et al. Field programmable port extender (FPX) for distributed routing and queuing , 2000, FPGA '00.
[4] John W. Lockwood,et al. An Extensible, System-On-Programmable-Chip, Content-Aware Internet Firewall , 2003, FPL.
[5] John W. Lockwood,et al. Deep packet inspection using parallel bloom filters , 2004, IEEE Micro.
[6] Ronald L. Rivest,et al. The MD5 Message-Digest Algorithm , 1992, RFC.
[7] John W. Lockwood,et al. Layered protocol wrappers for Internet packet processing in reconfigurable hardware , 2001, HOT 9 Interconnects. Symposium on High Performance Interconnects.
[8] John W. Lockwood,et al. Implementation of a content-scanning module for an Internet firewall , 2003, 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003..