Full-chip routing system for reducing Cu CMP & ECP variation

Topography variation has a significant impact on performance as well as printability for nanometer technologies. In this paper, we propose an improved full-chip routing system for reducing Cu CMP (Chemical Mechanical Polishing) & ECP (Electroplating) topology variation, in which CMP aware global routing, CMP aware layer assignment and ECP aware detailed routing are integrated. To the best of our knowledge, this is the first work to consider both Cu CMP and ECP variation all through routing procedure. First, a Cu CMP and ECP topology model considering both perimeter density and feature density is used in global routing, layer assignment and detailed routing to guide the whole optimization procedure. Second, a W-shape multilevel routing model is applied to fully control topology variation from a macroscopic level to a microscopic level. Third, layer assignment which plays a key role in trading off the density between interlayer and intralayer, is integrated into the multilevel routing system and a fast simulated annealing based algorithm is presented to take additive effect on multiple layers into consideration. Experiments show that the proposed algorithm can reduce 6%-7% post-ECP variation and 15%-17% post-CMP variation on average than CMP-aware detailed routing algorithm in [5]. Furthermore, it can insert smaller amount (about 5%) of dummy fill, which means less impact on performance.

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