An application of multiple-valued logic to a design of programmable logic arrays

A three-level programmable logic array (three-level PLA) consists of three main parts, the D array, the AND array, and the OR array, and each of these arrays can be programmed. In this paper, a design method for three-level PLA's is described. Main results obtained are 1) The minimization of the AND array corresponds to the minimization of a multiple-valued input two-valued output logic function; 2) By using the theory of multiple-valued decomposition of two-valued function, the computation time and the memory requirement for the minimization of the AND array can be reduced; and 3) The design of multiple-output function can be done in a similar way by introducing a variable which denotes the outputs.

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