A 10-Bit 50MHz Resistor String Digital-to-Analog Converter

A 10-bit 50 MHz digital-to-analog converter(DAC) is presented based on "dual ladder" resistor string and "best INL" layout techniques.By employing above techniques,the linearity and resolution requirements are satisfied without laser trimming or tuning.The output buffer is capable of driving 1.2 Vp-p to 75 Ω load and the output impedance can match the resistive load without extra power dissipation.The DAC is fabricated in a standard CMOS digital 0.18 μm process and it occupies a chip area of 0.5 mm2.The measured integral nonlinearity(INL) is 0.45 LSB.For sampling frequency up to 50 MS/s,the SNDR is better than 61 dB.The device dissipates 55 mW from a 3.3 V power supply.