A Cost-Effective FPGA-based Fault Simulation Environment

In this contribution, we present an FPGA-based simulation environment for fault attacks on cryptographic hardware designs. With our methodology, we are able to simulate the effects of global fault attacks from e.g., spikes and local attacks from e.g., focused laser beams. The environment simulates transient bit-flip faults in sequential elements of a digital design. In this way it is tailored to the simulation of fault attacks on cryptographic designs. It is a tool to verify the design's behaviour in case of fault attacks and to verify implemented countermeasures. The environment is script-based for fully automated modification of the digital design and simulation. It can handle designs in VHDL as well as in Verilog language and does not require modifications to the design's source code. We used our environment in a case study and successfully tested the effectiveness of a fault detection countermeasure in an elliptic curve cryptography design.

[1]  Massimo Violante,et al.  Exploiting FPGA for accelerating fault injection experiments , 2001, Proceedings Seventh International On-Line Testing Workshop.

[2]  Keshab K. Parhi,et al.  Low-Energy Digit-Serial/Parallel Finite Field Multipliers , 1998 .

[3]  Pedro J. Gil,et al.  Comparison and application of different VHDL-based fault injection techniques , 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

[4]  Jean-Sébastien Coron,et al.  Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems , 1999, CHES.

[5]  Shi-Yu Huang,et al.  Fault emulation: A new methodology for fault grading , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  Régis Leveugle,et al.  Using run-time reconfiguration for fault injection in hardware prototypes , 2000, 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2002. DFT 2002. Proceedings..

[7]  Patrick Schaumont,et al.  State-of-the-art of secure ECC implementations: a survey on known side-channel attacks and countermeasures , 2010, 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

[8]  Johan Karlsson,et al.  Fault injection into VHDL models: the MEFISTO tool , 1994 .

[9]  T. Itoh,et al.  A Fast Algorithm for Computing Multiplicative Inverses in GF(2^m) Using Normal Bases , 1988, Inf. Comput..

[10]  Francisco Rodríguez-Henríquez,et al.  Cryptographic Algorithms on Reconfigurable Hardware (Signals and Communication Technology) , 2006 .

[11]  Alfred Menezes,et al.  Guide to Elliptic Curve Cryptography , 2004, Springer Professional Computing.

[12]  Jörn-Marc Schmidt,et al.  A Practical Fault Attack on Square and Multiply , 2008, 2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography.

[13]  Richard J. Lipton,et al.  On the Importance of Checking Cryptographic Protocols for Faults (Extended Abstract) , 1997, EUROCRYPT.

[14]  Martin Otto,et al.  Fault attacks and countermeasures , 2005 .

[15]  Cheng-Wen Wu,et al.  Sequential circuit fault simulation using logic emulation , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[16]  Abílio Parreira.  A Novel Approach to FPGA-Based Hardware Fault Modeling and Simulation , 2004 .

[17]  Ricardo Dahab,et al.  Fast Multiplication on Elliptic Curves over GF(2m) without Precomputation , 1999, CHES.

[18]  Massimo Violante,et al.  An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits , 2002, J. Electron. Test..