Synthesis of high-speed pass-transistor logic
暂无分享,去创建一个
The authors present new pass-transistor logic which contains fewer transistors and has better performance than Hitachi's double pass-transistor logic (DPL). The new CMOS logic, dual value logic (DVL), is characterized by excellent speed and low power.
[1] Yasuhiko Sasaki,et al. Lean integration: achieving a quantum leap in performance and cost of logic LSIs , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.
[2] Kazuo Yano,et al. A 3.8-ns CMOS 16*16-b multiplier using complementary pass-transistor logic , 1990 .
[3] Makoto Suzuki,et al. A 4.4 ns CMOS 54/spl times/54-b multiplier using pass-transistor multiplexer , 1995 .
[4] Makoto Suzuki,et al. A 1.5-ns 32-b CMOS ALU in double pass-transistor logic , 1993 .