A memory cell with single-electron and metal-oxide-semiconductor transistor integration
暂无分享,去创建一个
A single-electron transistor memory cell with metal-oxide-semiconductor field-effect transistor sensing has been fabricated in silicon-on-insulator material. The single-electron transistor, coupled to a memory node, is defined in the upper silicon layer. The memory node forms the gate of a metal-oxide-semiconductor field-effect transistor with its channel in the substrate silicon. At 4.2 K, there are two different states of the memory-node voltage, separated by the single-electron transistor Coulomb gap. These states are sensed at high-current output levels by the metal-oxide-semiconductor transistor. The metal-oxide-semiconductor transistor current also shows evidence of gate-dependent conductance oscillations in the coupled single-electron transistor.
[1] Naoki Yokoyama,et al. Room temperature operation of Si single-electron memory with self-aligned floating dot gate , 1997 .
[2] R. A. Smith,et al. Gate controlled Coulomb blockade effects in the conduction of a silicon quantum wire , 1997 .
[3] Haroon Ahmed,et al. Silicon single electron memory cell , 1998 .
[4] Sandip Tiwari,et al. A silicon nanocrystals based memory , 1996 .