High-level synthesis for run-time hardware Trojan detection and recovery

Current Integrated Circuit (IC) development process raises security concerns about hardware Trojan which are maliciously inserted to alter functional behavior or leak sensitive information. Most of the hardware Trojan detection techniques rely on a golden (trusted) IC against which to compare a suspected one. Hence they cannot be applied to designs using third party Intellectual Property (IP) cores where golden IP is unavailable. Moreover, due to the stealthy nature of hardware Trojan, there is no technique that can guarantee Trojan-free after manufacturing test. As a result, Trojan detection and recovery at run time acting as the last line of defense is necessary especially for mission-critical applications. In this paper, we propose design rules to assist run-time Trojan detection and fast recovery by exploring diversity of untrusted third party IP cores. With these design rules, we show the optimization approach to minimize the cost of implementation in terms of the number of different IP cores used by the implementation.

[1]  George J. Vachtsevanos,et al.  A particle-filtering approach for on-line fault diagnosis and failure prognosis , 2009 .

[2]  Olivier Sentieys,et al.  GAUT: An architectural synthesis tool for dedicated signal processors , 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.

[3]  Jeyavijayan Rajendran,et al.  High-level synthesis for security and trust , 2013, 2013 IEEE 19th International On-Line Testing Symposium (IOLTS).

[4]  Mark Mohammad Tehranipoor,et al.  Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution , 2013, IEEE Design & Test.

[5]  Rémi Gaillard,et al.  Single Event Effects: Mechanisms and Classification , 2011 .

[6]  Mark Mohammad Tehranipoor,et al.  Sensitivity analysis to hardware Trojans using power supply transient signals , 2008, 2008 IEEE International Workshop on Hardware-Oriented Security and Trust.

[7]  Susmit Jha,et al.  Randomization Based Probabilistic Approach to Detect Trojan Circuits , 2008, 2008 11th IEEE High Assurance Systems Engineering Symposium.

[8]  Yiorgos Makris,et al.  Hardware Trojan detection using path delay fingerprint , 2008, 2008 IEEE International Workshop on Hardware-Oriented Security and Trust.

[9]  Swarup Bhunia,et al.  Hardware Trojan: Threats and emerging solutions , 2009, 2009 IEEE International High Level Design Validation and Test Workshop.

[10]  Inseok Hwang,et al.  A Survey of Fault Detection, Isolation, and Reconfiguration Methods , 2010, IEEE Transactions on Control Systems Technology.

[11]  Christos A. Papachristou,et al.  MERO: A Statistical Approach for Hardware Trojan Detection , 2009, CHES.

[12]  Peter Hazucha,et al.  Characterization of soft errors caused by single event upsets in CMOS processes , 2004, IEEE Transactions on Dependable and Secure Computing.