A low-swing differential signalling scheme for on-chip global interconnects

The dense very deep submicron (VDSM) system on chips (SoC) face a serious limitation in performance due to reverse scaling of global interconnects. Interconnection techniques which decrease delay, delay variation and ensure signal integrity, play an important role in the growth of the semiconductor industry into future generations. Current-mode low-swing interconnection techniques provide an attractive alternative to conventional full-swing voltage mode signaling in terms of delay, power and noise immunity. In this paper, we present a new current-mode low-swing interconnection technique which reduces the delay and delay variations in global interconnects. Extensive simulations for performance of our circuit under crosstalk, supply voltage, process and temperature variations were performed. The results indicate significant savings in power, reduction in delay and increase in noise immunity compared to other techniques.

[1]  M. Yamashina,et al.  A current direction sense technique for multiport SRAM's , 1996 .

[2]  S. I. Long,et al.  Low power GaAs current-mode 1.2 Gb/s interchip interconnections , 1997 .

[3]  Wentai Liu,et al.  Current-mode signaling in deep submicrometer global interconnects , 2003, IEEE Trans. Very Large Scale Integr. Syst..

[4]  J.D. Meindl,et al.  Optimal interconnection circuits for VLSI , 1985, IEEE Transactions on Electron Devices.

[5]  Kurt Keutzer,et al.  A global wiring paradigm for deep submicron design , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  Seungyoung Ahn,et al.  A novel twisted differential line for high-speed on-chip interconnections with reduced crosstalk , 2002, 4th Electronics Packaging Technology Conference, 2002..

[7]  Wayne Burleson,et al.  Current sensing techniques for global interconnects in very deep submicron (VDSM) CMOS , 2001, Proceedings IEEE Computer Society Workshop on VLSI 2001. Emerging Technologies for VLSI Systems.

[8]  J. Meindl,et al.  Optimal interconnect circuits for VLSI , 1984, 1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[9]  Evert Seevinck,et al.  Current-mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOS SRAM's , 1991 .

[10]  George Varghese,et al.  Low-swing on-chip signaling techniques: effectiveness and robustness , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[11]  William J. Dally,et al.  Digital systems engineering , 1998 .

[12]  Eby G. Friedman,et al.  Repeater design to reduce delay and power in resistive interconnect , 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.

[13]  H. B. Bakoglu,et al.  Circuits, interconnections, and packaging for VLSI , 1990 .