A reversible approach to two’s complement addition using a novel reversible TCG gate and its 4 dot 2 electron QCA architecture
暂无分享,去创建一个
Chitrita Chaudhuri | Atal Chaudhuri | Mahamuda Sultana | Diganta Sengupta | Ayan Chaudhuri | A. Chaudhuri | Mahamuda Sultana | Ayan Chaudhuri | C. Chaudhuri | D. Sengupta
[1] Ashis Kumer Biswas,et al. Efficient approaches for designing reversible Binary Coded Decimal adders , 2008, Microelectron. J..
[2] E. Swartzlander,et al. Adder Designs and Analyses for Quantum-Dot Cellular Automata , 2007, IEEE Transactions on Nanotechnology.
[3] Namit Gupta,et al. Basic Reversible Logic Gates and It's Qca Implementation , 2014 .
[4] N. Ranganathan,et al. Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs , 2010, JETC.
[5] Alexandre Valentian,et al. Limits of CMOS Technology and Interest of NEMS Relays for Adiabatic Logic Applications , 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.
[6] Wolfgang Porod,et al. Quantum cellular automata , 1994 .
[7] T.J. Dysart,et al. > Replace This Line with Your Paper Identification Number (double-click Here to Edit) < 1 , 2001 .
[8] Gerhard W. Dueck,et al. Level Compaction in Quantum Circuits , 2006, 2006 IEEE International Conference on Evolutionary Computation.
[9] Wolfgang Porod,et al. Quantum-dot cellular automata : computing with coupled quantum dots , 1999 .
[10] Gerhard W. Dueck,et al. A transformation based algorithm for reversible logic synthesis , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[11] Keivan Navi,et al. A Novel Reversible Full Adder Circuit for Nanotechnology Based Systems , 2007 .
[12] Liang Lu,et al. QCA Systolic Array Design , 2013, IEEE Transactions on Computers.
[13] Ralph C. Merkle,et al. Two types of mechanical reversible logic , 1993 .
[14] K. Poulose Jacob,et al. Design of compact reversible decimal adder using RPS gates , 2012, 2012 World Congress on Information and Communication Technologies.
[15] I. Chuang,et al. Quantum Computation and Quantum Information: Bibliography , 2010 .
[16] Pérès,et al. Reversible logic and quantum computers. , 1985, Physical review. A, General physics.
[17] E. Knill,et al. A scheme for efficient quantum computation with linear optics , 2001, Nature.
[18] Parag K. Lala,et al. Reversible-logic design with online testability , 2006, IEEE Transactions on Instrumentation and Measurement.
[19] Charles H. Bennett,et al. Logical reversibility of computation , 1973 .
[20] Kamalika Datta,et al. A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines , 2015, IEEE Transactions on Computers.
[21] Vikram Pudi,et al. Efficient Design of a Hybrid Adder in Quantum-Dot Cellular Automata , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[22] H R Bhagyalakshmi,et al. Design of a Multifunction BVMF Reversible Logic Gate and its Applications , 2011 .
[23] Muhammad Mahbubur Rahman,et al. Fault tolerant reversible logic synthesis: Carry look-ahead and carry-skip adders , 2009, 2009 International Conference on Advances in Computational Tools for Engineering Applications.
[24] Chun-Yao Wang,et al. Synthesis of Reversible Sequential Elements , 2007, 2007 Asia and South Pacific Design Automation Conference.
[25] New Decomposition Theorems on Majority Logic for Low-Delay Adder Designs in Quantum Dot Cellular Automata , 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.
[26] Stefania Perri,et al. Area-Delay Efficient Binary Adders in QCA , 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[27] M. Arun,et al. Reversible Arithmetic Logic Gate (ALG) for Quantum Computation , 2013 .
[28] P. D. Tougaw,et al. Quantum cellular automata: the physics of computing with arrays of quantum dot molecules , 1994, Proceedings Workshop on Physics and Computation. PhysComp '94.
[29] Robert Wille,et al. Exploiting Negative Control Lines in the Optimization of Reversible Circuits , 2013, RC.
[30] Gerhard W. Dueck,et al. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION ( VLSI ) SYSTEMS , VOL . ? ? ? , NO . ? ? ? , ? ? ? , 2003 .
[31] R. Merkle. Reversible electronic logic using switches , 1993 .
[32] E. Lutz,et al. Experimental verification of Landauer’s principle linking information and thermodynamics , 2012, Nature.
[33] Himanshu Thapliyal,et al. Novel Reversible `TSG' Gate and Its Application for Designing Components of Primitive Reversible/Quantum ALU , 2005, 2005 5th International Conference on Information Communications & Signal Processing.
[34] Keivan Navi,et al. A Novel Reversible BCD Adder For Nanotechnology Based Systems , 2008 .
[35] R. Feynman. Simulating physics with computers , 1999 .
[36] Atal Chaudhuri,et al. Realization of a Novel Reversible SCG Gate and its Application for Designing Parallel Adder/Subtractor and Match Logic , 2011 .
[37] T. Toffoli,et al. Conservative logic , 2002, Collision-Based Computing.
[38] James A. Hutchby,et al. Limits to binary logic switch scaling - a gedanken model , 2003, Proc. IEEE.
[39] Earl E. Swartzlander,et al. Adder and Multiplier Design in Quantum-Dot Cellular Automata , 2009, IEEE Transactions on Computers.
[40] N. Ranganathan,et al. Design of Testable Reversible Sequential Circuits , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[41] S. P. Maity,et al. Implementation of HNG using MZI , 2012, 2012 Third International Conference on Computing, Communication and Networking Technologies (ICCCNT'12).