A discrete resizing and concurrent power combining structure for linear CMOS power amplifier
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Kyu Hwan An | Joy Laskar | Chang-Ho Lee | Kevin T. Kornegay | Youngchang Yoon | Hyungwook Kim | Woonyun Kim | Jihwan Kim
[1] B. Wooley,et al. A CMOS RF power amplifier with parallel amplification for efficient power control , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).
[2] Gang Liu,et al. Fully Integrated CMOS Power Amplifier With Efficiency Enhancement at Power Back-Off , 2008, IEEE Journal of Solid-State Circuits.
[3] L.E. Larson,et al. A capacitance-compensation technique for improved linearity in CMOS class-AB power amplifiers , 2004, IEEE Journal of Solid-State Circuits.
[4] Ali Hajimiri,et al. Fully integrated CMOS power amplifier design using the distributed active-transformer architecture , 2002, IEEE J. Solid State Circuits.
[5] R. Bishop,et al. A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process , 2006, IEEE Journal of Solid-State Circuits.
[6] Michiel Steyaert,et al. A 2.45-GHz 0.13-$\mu{\hbox {m}}$ CMOS PA With Parallel Amplification , 2007, IEEE Journal of Solid-State Circuits.
[7] Ali M. Niknejad,et al. A single-chip highly linear 2.4GHz 30dBm power amplifier in 90nm CMOS , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[8] Ockgoo Lee,et al. A 2.4 GHz Fully Integrated Linear CMOS Power Amplifier With Discrete Power Control , 2009, IEEE Microwave and Wireless Components Letters.