ESD robustness and scaling implications of aluminum and copper interconnects in advanced semiconductor technology
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[1] J. G. Ryan,et al. Dual Damascene: a ULSI wiring technology , 1991, 1991 Proceedings Eighth International IEEE VLSI Multilevel Interconnection Conference.
[2] C. Duvvury,et al. The impact of technology scaling on ESD robustness and protection circuit design , 1995 .
[3] Daniel C. Edelstein,et al. VLSI on-chip interconnection performance simulations and measurements , 1995, IBM J. Res. Dev..
[4] Timothy J. Maloney,et al. Integrated circuit metal in the charged device model: bootstrap heating, melt damage, and scaling laws , 1993 .
[5] Kaustav Banerjee,et al. Characterization of contact and via failure under short duration high pulsed current stress , 1997, 1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual.
[6] J. G. Ryan,et al. The evolution of interconnection technology at IBM , 1995, IBM J. Res. Dev..
[7] Dante M. Tasca,et al. Pulse Power Failure Modes in Semiconductors , 1970 .
[8] A. Amerasekera,et al. The effect of interconnect scaling and low-k dielectric on the thermal characteristics of the IC metal , 1996, International Electron Devices Meeting. Technical Digest.
[9] Steven H. Voldman,et al. Scaling, optimization and design considerations of electrostatic discharge protection circuits in CMOS technology , 1994 .
[10] M. Bohr. Interconnect scaling-the real limiter to high performance ULSI , 1995, Proceedings of International Electron Devices Meeting.
[11] G. A. Sai-Halasz,et al. Performance trends in high-end processors , 1995, Proc. IEEE.
[12] Yuh-J. Mii. Performance consideration for the scaling of submicron on-chip interconnections , 1993, Other Conferences.
[13] Paul Michael Solomon. The Need For Low Resistance Interconnects In Future High-Speed Systems , 1988, Other Conferences.
[14] J. S. Smith. Electrical Overstress Failure Analysis in Microcircuits , 1978, 16th International Reliability Physics Symposium.