Real-time digital multi-function protection system on reconfigurable hardware

This study proposes a multi-function power system protective relay hardware design built with various functional hardware processing cores on the field programmable gate array (FPGA). This practical and systematic method lends itself to a paralleled and pipelined hardware emulation of individual signal processing and protection components. Detailed emulation designs are presented for the following protective relays: distance, directional overcurrent, voltage, and frequency protection. The necessary signal processing functions required to operate these relays are also emulated, allowing the protection system to be stand-alone and fed with instantaneous fault data. Real-time experimental results are presented to verify the functions of the target hardware relay on the Xilinx ® Virtex-7 FPGA. Case studies provide the efficacy of the multi-function relay design in terms of accuracy, latency, and resource consumption.

[1]  John Stephen Walther,et al.  The Story of Unified Cordic , 2000, J. VLSI Signal Process..

[2]  Jyh-Cherng Gu,et al.  Removal of DC offset in current and voltage signals using a novel Fourier filter algorithm , 2000 .

[3]  M. A. Manzoul Multiple overcurrent relays using a single microprocessor , 1990 .

[4]  C. Mozina,et al.  Multifunction digital relay commissioning and maintenance testing , 2005, IEEE Industry Applications Magazine.

[5]  Yuan Chen,et al.  Multi-FPGA digital hardware design for detailed large-scale real-time electromagnetic transient simulation of power systems , 2013 .

[6]  Shanshan Liu,et al.  The Healing Touch: Tools and Challenges for Smart Grid Restoration , 2014, IEEE Power and Energy Magazine.

[7]  Peng Ning,et al.  A Resilient Real-Time System Design for a Secure and Reconfigurable Power Grid , 2011, IEEE Transactions on Smart Grid.

[8]  Jianhui Wang,et al.  Smart Transmission Grid: Vision and Framework , 2010, IEEE Transactions on Smart Grid.

[9]  Mladen Kezunovic,et al.  Design optimization and performance evaluation of the relaying algorithms, relays and protective systems using advanced testing tools , 2000 .

[10]  S. P. Valsan,et al.  Protective relaying for power transformers using field programmable gate array , 2008 .

[11]  S. Davies Grid gets the smarts , 2012 .

[12]  T. S. Sidhu,et al.  Laboratory Investigation of IEC 61850-9-2-Based Busbar and Distance Relaying With Corrective Measure for Sampled Value Loss/Delay , 2011, IEEE Transactions on Power Delivery.

[13]  M. Kezunovic,et al.  Microprocessor applications to substation control and protection , 1988, IEEE Computer Applications in Power.

[14]  P. Djurić,et al.  Frequency tracking in power networks in the presence of harmonics , 1993 .

[15]  A.G. Phadke,et al.  Wide Area Protection—Technology and Infrastructures , 2006, IEEE Transactions on Power Delivery.

[16]  Jiadai Liu,et al.  A Real-Time Nonlinear Hysteretic Power Transformer Transient Model on FPGA , 2014, IEEE Transactions on Industrial Electronics.

[17]  P. B. Winston,et al.  Bibliography of Relay Literature, 2007 IEEE Committee Report , 2010 .

[18]  T. Hlibka,et al.  A Microcomputer Based Ultra-High-Speed Dostance Relay: Field Tests , 1981, IEEE Transactions on Power Apparatus and Systems.

[19]  Jack E. Volder The CORDIC Trigonometric Computing Technique , 1959, IRE Trans. Electron. Comput..

[20]  M. A. Manzoul Multi-function protective relay on FPGA , 1998 .

[21]  James S. Thorp,et al.  Protecting power systems in the post-restructuring era , 1999 .

[22]  Xiaolei Liu,et al.  Real-Time Implementation of a Hybrid Protection Scheme for Bipolar HVDC Line Using FPGA , 2011, IEEE Transactions on Power Delivery.

[23]  Yuan Chen,et al.  FPGA-based real-time EMTP , 2009, 2009 IEEE Power & Energy Society General Meeting.