A Multimode Transmitter in 0.13 m CMOS Using

This paper presents a system-independent trans- mitter architecture based on a direct-digital RF-modulator which combines the D/A conversion, up-conversion, unwanted sideband rejection, power control, and part of the digital image-rejection filtering into a single mixed-signal circuit block. The multimode capability of the architecture is demonstrated with WCDMA, EDGE, and WLAN system requirements. The modulator achieves 90 dB of power control range and with an external power amplifier module, WCDMA EVM of less than 2% from signal powers of 20 dBm to 25 dBm. The noise floor level defined by the quan- tization noise at 190 MHz offset from the carrier is 150 dBc/Hz measured at the output of the PA with 25 dBm signal power. The analog power consumption with the maximum signal power level is 92 mW and scales down to 46 mW when reducing the signal level to 43 dBFS. The digital power consumption is 65 mW. The chip is implemented with a standard 0.13 m 1.2 V digital CMOS with total silicon area of 4 mm .

[1]  P. Eloranta.  A 14-bit D/A-converter with digital calibration , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[2]  F. Murden,et al.  A polar modulator transmitter for GSM/EDGE , 2004, IEEE Journal of Solid-State Circuits.

[3]  Arto Palin,et al.  VoIP call over WLAN with Bluetooth headset multiradio interoperability solutions , 2005, 2005 IEEE 16th International Symposium on Personal, Indoor and Mobile Radio Communications.

[4]  Pallab Midya,et al.  An all-digital universal RF transmitter [CMOS RF modulator and PA] , 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).

[5]  Arthur H. M. van Roermund,et al.  Mismatch-based timing errors in current steering DACs , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[6]  Kwang-Hyun Baek,et al.  A 1.6GS/s 12b return-to-zero GaAs RF DAC for multiple Nyquist operation , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[7]  K. Bult,et al.  A 10-b, 500-MSample/s CMOS DAC in 0.6 mm2 , 1998, IEEE J. Solid State Circuits.

[8]  K. Gard,et al.  Direct conversion dual-band SiGe BiCMOS transmitter and receive PLL IC for CDMA/WCDMA/AMPS/GPS applications , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

[9]  M.J.M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .

[10]  Rui L. Aguiar,et al.  Oscillatorless clock multiplication , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[11]  I. Vassiliou,et al.  A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN , 2003, IEEE J. Solid State Circuits.

[12]  Behzad Razavi,et al.  RF Microelectronics , 1997 .

[13]  O. Moreira-Tamayo,et al.  All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS , 2004, IEEE Journal of Solid-State Circuits.

[14]  Lawrence E. Larson,et al.  Digital-IF WCDMA handset transmitter IC in 0.25-μm SiGe BiCMOS , 2004 .

[15]  P. Eloranta,et al.  Direct-digital RF modulator IC in 0.13 /spl mu/m CMOS for wide-band multi-radio applications , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[16]  G. Brenna,et al.  A 2-GHz carrier leakage calibrated direct-conversion WCDMA transmitter in 0.13-/spl mu/m CMOS , 2004, IEEE Journal of Solid-State Circuits.