Trapping in GaN-based metal-insulator-semiconductor transistors: Role of high drain bias and hot electrons

This paper describes an extensive analysis of the role of off-state and semi-on state bias in inducing the trapping in GaN-based power High Electron Mobility Transistors. The study is based on combined pulsed characterization and on-resistance transient measurements. We demonstrate that—by changing the quiescent bias point from the off-state to the semi-on state—it is possible to separately analyze two relevant trapping mechanisms: (i) the trapping of electrons in the gate-drain access region, activated by the exposure to high drain bias in the off-state; (ii) the trapping of hot-electrons within the AlGaN barrier or the gate insulator, which occurs when the devices are operated in the semi-on state. The dependence of these two mechanisms on the bias conditions and on temperature, and the properties (activation energy and cross section) of the related traps are described in the text.

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