A DC-2.5GHz wide dynamic-range attenuator in 0.13/spl mu/m CMOS technology

A CMOS attenuator with wide dynamic range has been designed and fabricated in a 0.13/spl mu/m CMOS process. The design employs two nonidentical cascaded T-stages that are activated consecutively to improve linearity. The design operates in the frequency band of DC-2.5GHz with 0.9-3.5dB insertion loss and 42dB maximum attenuation in the entire frequency range. Worst case SII is -8.2dB across the frequency band. The design achieves an IIP3 of +20 dBm at mid-attenuation.

[1]  R. H. Caverly.  Distortion in broad-band gallium arsenide MESFET control and switch circuits , 1991 .

[2]  Robert J. Bayruns,et al.  The bootstrapped gate FET (BGFET)-a new control transistor , 1995, GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995.

[3]  Willy Sansen,et al.  Distortion in bipolar transistor variable-gain amplifiers , 1973 .

[4]  Ali M. Niknejad,et al.  A DC-10GHz linear-in-dB attenuator in 0.13 /spl mu/m CMOS technology , 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).

[5]  Kari Halonen,et al.  A linear-control wide-band CMOS attenuator , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[6]  B. Maoz.  A novel, linear voltage variable MMIC attenuator , 1990 .