Memory Optimization on Heterogeneous Multiprocessor Embedded Systems for DSP Applications

Abstract Embedded systems are widely used in the implementation of DSP applications. The implementation of such a system can be entirely accomplished on a single ASIC chip. An ASIC implementing a complicated DSP task is normally composed of a set of heterogeneous processing elements, an interconnection network, and memory elements. Because the type and size of the memory used have a great effect on the cost and complexity of the entire system, a memory allocation process should be optimized to reduce the memory complexity. This paper proposes a static memory allocation algorithm for synchronous heterogeneous multiprocessor integrated systems, implementing DSP applications. This allocation algorithm is designed to minimize the memory size, or alternatively, the number of registers. The proposed register allocation algorithm is shown to outperform other algorithms on all the tested benchmarks. Furthermore, two types of memory systems are introduced: central shared memory and distributed shared memory systems. The advantages and disadvantages of each memory system are also given.