Circuit for logical-binary functions using MOS floating-gate devices

We have designed a logical external configuration circuit in which a highly-functional device called Neuron MOS Transistor (vMOS) is utilized as a key component. A dramatic reduction in the number of transistors as well as in complexity of interconnections has been achieved by the new circuit configuration using vMOS. In this work, simulations of our circuit of logical external configuration are presented using PSpice and we included the elimination of input-stage D/A converter like proposal to future. This circuit is able to represent the logic functions: AND, OR, NAND, NOR, Exclusive-NOR, Exclusive-OR, among others, with a 4-bits input option.

[1]  J. Ramirez-Angulo,et al.  A new programmable logic family using multiple-input floating-gate transistors [CMOS] , 1997, Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg.

[2]  Tadahiro Ohmi,et al.  Neuron MOS binary-logic integrated circuits. II. Simplifying techniques of circuit configuration and their practical applications , 1993 .

[3]  Tadahiro Ohmi,et al.  An intelligent MOS transistor featuring gate-level weighted sum and threshold operations , 1991, International Electron Devices Meeting 1991 [Technical Digest].

[4]  Tadahiro Ohmi,et al.  A self-learning neural-network LSI using neuron MOSFETs , 1992, 1992 Symposium on VLSI Technology Digest of Technical Papers.

[5]  J. Ramirez-Angulo,et al.  Modeling multiple-input floating-gate transistors for analog signal processing , 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.

[6]  Tadashi Shibata,et al.  Neuron MOS binary-logic integrated circuits. I. Design fundamentals and soft-hardware-logic circuit implementation , 1993 .

[7]  Tadashi Shibata,et al.  A functional MOS transistor featuring gate-level weighted sum and threshold operations , 1992 .