Mercury cadmium telluride (MCT) 2x64 linear arrays for long-wavelength infrared (LWIR) applications with large area diodes and charged coupled devices (CCD) silicon readouts were designed, manufactured and tested. The HgCdTe layers were grown by molecular beam epitaxy (MBE) technology on (103) GaAs substrates with CdZnTe buffer layers and have a cutoff wavelength λ co 10.0-12.2 μm. To decrease the surface influence of the recombination processes of the carriers, layers with a graded composition increasing toward the surface of composition Hg a-x Cd x Te were grown. Silicon readouts with CCD multiplexers with input direct injection circuits were designed, manufactured and tested. The testing procedure to qualify Read Out Integration Circuits (ROICs) on the wafer level at T=300 K was established. The silicon readouts for 2x64 arrays, with skimming and partitioning functions (because of large square diodes) included, were manufactured by n-channel MOS technology with buried or surface channel CCD registers. Designed CCD readouts are driven with four- or two-phase clock pulses. The HgCdTe arrays and Si CCD readouts were hybridized by cold welding In bumps technology. The parameters of the hybrid arrays measured have shown a 100% yield after the hybridization process. Even with a skimming mode used for long integration times of 24-30 μs for the large square MCT n-p-junctions needed for some applications, the detectivity was not less than D * ≥2×10 10 cm×Hz 1/2 /W.