A Demonstration of a HT-Detection Method Based on Impedance Measurements of the Wiring Around ICs
暂无分享,去创建一个
Tsutomu Matsumoto | Makoto Nagata | Daisuke Fujimoto | Noriyuki Miura | Yu-Ichi Hayashi | Shota Nin | Tsutomu Matsumoto | Y. Hayashi | M. Nagata | N. Miura | Daisuke Fujimoto | Shota Nin
[1] Makoto Nagata,et al. An on-chip continuous time power supply noise monitoring technique , 2009, 2009 IEEE Asian Solid-State Circuits Conference.
[2] Yiorgos Makris,et al. Experiences in Hardware Trojan design and implementation , 2009, 2009 IEEE International Workshop on Hardware-Oriented Security and Trust.
[3] Takushi Hashida,et al. An On-Chip Waveform Capturer and Application to Diagnosis of Power Delivery in SoC Integration , 2011, IEEE Journal of Solid-State Circuits.
[4] Yiorgos Makris,et al. Hardware Trojan detection using path delay fingerprint , 2008, 2008 IEEE International Workshop on Hardware-Oriented Security and Trust.
[5] Jason R. Hamlet,et al. Unique signatures from printed circuit board design patterns and surface mount passives , 2017, 2017 International Carnahan Conference on Security Technology (ICCST).
[6] Mark Mohammad Tehranipoor,et al. Power supply signal calibration techniques for improving detection resolution to hardware Trojans , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.
[7] M. Nagata,et al. Emulation of high-frequency substrate noise generation in CMOS digital circuits , 2014 .
[8] Makoto Nagata,et al. An Arbitrary Digital Power Noise Generator Using 65 nm CMOS Technology , 2010, IEICE Trans. Electron..
[9] Makoto Nagata,et al. Performance Evaluation of Probing Front-End Circuits for On-Chip Noise Monitoring , 2013, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..
[10] Farinaz Koushanfar,et al. A Survey of Hardware Trojan Taxonomy and Detection , 2010, IEEE Design & Test of Computers.