Design considerations on low-voltage low-power data converters

In this paper, we discuss theoretical and practical issues concerning low-voltage and low-power data converters. By looking at a series of constraints affecting the design of basic elements and building blocks, the paper analyzes different architectures for Nyquist rate data converters and discusses important aspects of low-voltage and low-power operation. Following this, the minimization of power consumption in the very popular sigma-delta technique is considered. A number of hints and indications are provided throughout the paper.

[1]  M.G.R. Degrauwe,et al.  A rail-to-rail input/output CMOS power amplifier , 1989 .

[2]  Chung-Yu Wu,et al.  A 1.5 V CMOS balanced differential switched-capacitor filter with internal clock boosters , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

[3]  Pierre Jarron,et al.  1-M sample/sec 12-bit low-power pipelined A/D converter , 1990, IEEE International Symposium on Circuits and Systems.

[4]  A. Dingwall,et al.  An 8-MHz CMOS subranging 8-bit A/D converter , 1985, IEEE Journal of Solid-State Circuits.

[5]  Gordon W. Roberts,et al.  High-swing MOS current mirror with arbitrarily high output resistance , 1992 .

[6]  Behzad Razavi,et al.  Design techniques for high-speed, high-resolution comparators , 1992 .

[7]  J. W. Yang,et al.  High-resolution low-power CMOS D/A converter , 1988, 1988., IEEE International Symposium on Circuits and Systems.

[8]  A. Yukawa,et al.  A 12 bit 5 μsec CMOS recursive ADC with 25 mW power consumption , 1989, 1989 Proceedings of the IEEE Custom Integrated Circuits Conference.

[9]  J.A. Fisher A high-performance CMOS power amplifier , 1985, IEEE Journal of Solid-State Circuits.

[10]  M. Steyaert,et al.  Switched-Opamp, a Technique for Realising full CMOS Switched-Capacitor Filters at Very Low Voltages , 1993, ESSCIRC '93: Nineteenth European Solid-State Circuits Conference.

[11]  Paul R. Gray,et al.  A pipelined 13-bit 250-ks/s 5-V analog-to-digital converter , 1988 .

[12]  Hae-Seung Lee A 12-b 600 ks/s digitally self-calibrated pipelined algorithmic ADC , 1994 .

[13]  Eric A. Vittoz The Design of High-Performance Analog Circuits on Digital CMOS Chips , 1985 .

[14]  Franco Maloberti,et al.  Design of analog blocks for low-voltage switched systems , 1994, Proceedings of 1994 37th Midwest Symposium on Circuits and Systems.

[15]  K. Nagaraj Large-swing CMOS buffer amplifier , 1989 .

[16]  J.F. Duque-Carrillo,et al.  A family of bias circuits for high input swing CMOS operational amplifiers , 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

[17]  H.J. De Man,et al.  Adaptive biasing CMOS amplifiers , 1982, IEEE Journal of Solid-State Circuits.

[18]  R. F. Wassenaar,et al.  Rail-to-rail constant-gm input stage and class AB output stage for low-voltage CMOS op amps , 1994 .

[19]  Akira Matsuzawa,et al.  A 10-b 20-MHz 30-mW pipelined interpolating CMOS ADC , 1993 .

[20]  D. J. Allstot,et al.  A family of high-swing CMOS operational amplifiers , 1989 .

[21]  T. Saramaki,et al.  A stereo 97 dB SNR audio sigma-delta ADC , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

[22]  C.A.T. Salama,et al.  A low-power high-speed 10-bit CMOS-compatible D/A converter , 1990, IEEE International Symposium on Circuits and Systems.

[23]  B. Leung,et al.  Multibit Sigma - Delta A/D converter incorporating a novel class of dynamic element matching techniques , 1992 .

[24]  E. Dijkstra,et al.  Low Power Oversampled A/D Converters , 1995 .

[25]  Masumi Kasahara,et al.  A CMOS 9 bit 25 MHz 100 mW ADC for mixed analog/digital LSIs , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

[26]  Evert Dijkstra,et al.  A Versatile Low Power Oversampled A/D Converter , 1992, ESSCIRC '92: Eighteenth European Solid-State Circuits conference.

[27]  J. Fellrath,et al.  CMOS analog integrated circuits based on weak inversion operations , 1977 .

[28]  N. Sugawa,et al.  A CMOS 20 MHz 8 bit 50 mW ADC for mixed analog/digital ASICs , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

[29]  Paul Jespers,et al.  A 10-bit pipelined switched-current A/D converter , 1994 .

[30]  R. Koch,et al.  A Class AB High Swing CMOS Power Amplifier , 1991, ESSCIRC '91: Proceedings - Seventeenth European Solid-State Circuits Conference.

[31]  Gabor C. Temes,et al.  Oversampling delta-sigma data converters : theory, design, and simulation , 1992 .

[32]  L. R. Carley,et al.  A noise-shaping coder topology for 15+ bit converters , 1989 .

[33]  Franco Maloberti,et al.  Novel circuit solutions for rail-to-rail CMOS buffer , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

[34]  D.A. Hodges,et al.  All-MOS charge-redistribution analog-to-digital conversion techniques. II , 1975, IEEE Journal of Solid-State Circuits.