Steep Switching Hybrid Phase Transition FETs (Hyper-FET) for Low Power Applications: A Device-Circuit Co-design Perspective–Part I

Hybrid-phase-transition FETs (Hyper-FETs) are recently proposed steep switching devices that utilize the phase transition materials (PTM) to achieve a boost in the ratio of ON (<inline-formula> <tex-math notation="LaTeX">${I}_{{{\mathrm {ON}}}})$ </tex-math></inline-formula> and OFF currents (<inline-formula> <tex-math notation="LaTeX">${I}_{{{\mathrm {OFF}}}})$ </tex-math></inline-formula>. Prototypical demonstrations of the Hyper-FET have shown performance improvement in comparison with conventional transistors, which motivates the evaluation of its device-circuit design space. In part I, we analyze the device aspects establishing the effects of the resistivity and phase transition thresholds of the PTM on the characteristics of Hyper-FETs. Our analysis shows that the ratio of insulating and metallic state resistivity (<inline-formula> <tex-math notation="LaTeX">$\rho _{\mathrm {INS}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$\rho _{\mathrm {MET},}$ </tex-math></inline-formula> respectively) of the PTM needs to be higher than the <inline-formula> <tex-math notation="LaTeX">${I}_{{{\mathrm {ON}}}} /I_{{{\mathrm {OFF}}}}$ </tex-math></inline-formula> of its host transistor to achieve performance improvement in Hyper-FET. For a host transistor with <inline-formula> <tex-math notation="LaTeX">$I_{{{\mathrm {OFF}}}} = 0.051\mu \text{A}/\mu \text{m}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">${I}_{{{\mathrm {ON}}}} = 191.5\mu \text{A}/\mu \text{m}$ </tex-math></inline-formula>, <inline-formula> <tex-math notation="LaTeX">$\rho _{\mathrm {MET}}< \sim 2 \times 10^{\mathrm { {-3}}} \Omega $ </tex-math></inline-formula>.cm and <inline-formula> <tex-math notation="LaTeX">$\sim 7.5~\Omega $ </tex-math></inline-formula>.cm<inline-formula> <tex-math notation="LaTeX">$< \rho _{\mathrm {INS}}<20\,000 \Omega $ </tex-math></inline-formula>.cm is required to achieve proper device functionality with a boost in <inline-formula> <tex-math notation="LaTeX">${I}_{{{\mathrm {ON}}}}/{I}_{{{\mathrm {OFF}}}}$ </tex-math></inline-formula>. Additionally, we establish the ranges of phase transition thresholds that yield proper functionality of the Hyper-FETs considering different <inline-formula> <tex-math notation="LaTeX">${I}_{{{\mathrm {OFF}}}}$ </tex-math></inline-formula> targets. The methodology of choosing appropriate PTM geometry to achieve the target device characteristics is also described. We show that with proper design, Hyper-FETs achieve 94% larger <inline-formula> <tex-math notation="LaTeX">${I}_{{{\mathrm {ON}}}}$ </tex-math></inline-formula> at iso-<inline-formula> <tex-math notation="LaTeX">${I}_{{{\mathrm {OFF}}}}$ </tex-math></inline-formula> compared with a FinFET. We examine the circuit design aspects of Hyper-FET in part II.

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