DC fault current limiting effect of MMC submodule capacitors

Abstract DC short-circuit fault is a crucial issue in DC grids because the DC fault current increases rapidly with accompanying high fault energy. Limiting the DC fault current is a promising solution to simplify the design of the DC breaker and DC protection. The majority of existing DC fault current limiting (FCL) approaches relies on extra devices, such as DC line inductors. However, the control ability of modular multilevel converters (MMCs) is not optimized. In this study, the submodule (SM) capacitor dynamics during the short DC fault procedure was considered a new control objective, and its effect on the limiting DC fault current was analyzed and revealed. The complex time-varying DC fault transient circuit was comprehensively represented by introducing two base circuit structures and one duty cycle index D. The averaged circuit model was proposed on the basis of the state–space averaging method, which can intuitively show the relation between SM capacitor and DC fault current. The analytical expressions of the DC fault current was given, which can guide the design of the DC FCL control of MMC. The duty cycle index D can represent the discharge of SM capacitors, and the increasing speed of the DC fault current declines with the decrease in D. Accordingly, a feasible FCL control strategy was proposed by choosing D as a tool for affecting and controlling the DC fault current. The proposed FCL control strategy can evidently reduce dc fault current, and avoid the drawbacks of the conventional block or bypass approaches. The simulation results validated the effectiveness of the proposed analysis method and corresponding conclusions.