Survey and Analysis of Hardware Cryptographic and Steganographic Systems on FPGA
暂无分享,去创建一个
Rengarajan Amirtharaj | Sundararaman Rajagopala | John Bosco Bala | Har Narayan Up | R. Amirtharaj | S. Rajagopala | Harvard Up | Rengarajan Amirtharajan
[1] P. P. Deepthi,et al. Design, implementation and analysis of hardware efficient stream ciphers using LFSR based hash functions , 2009, Comput. Secur..
[2] Franco Maloberti,et al. A Pseudorandom Number Generator Based on Time-Variant Recursion of Accumulators , 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.
[3] Turki F. Al-Somani,et al. Hardware/Software Co-Design Implementations of Elliptic Curve Cryptosystems , 2009 .
[4] A. A. Zaidan,et al. On the Differences between Hiding Information and Cryptography Techniques: An Overview , 2010 .
[5] Ramin Ayanzadeh,et al. Two-layer Cellular Automata Based Cryptography , 2012 .
[6] Rengarajan Amirtharaj,et al. Stego on 2n:1 Platform for Users and Embedding , 2011 .
[7] Kevin Curran,et al. Digital image steganography: Survey and analysis of current methods , 2010, Signal Process..
[8] Turki F. Al-Somani,et al. High Performance Elliptic Curve GF(2m) Crypto-processor , 2006 .
[9] L. Chua,et al. Chaos: A tutorial for engineers , 1987, Proceedings of the IEEE.
[10] Jiaohua Qin,et al. A Review on Detection of LSB Matching Steganography , 2010 .
[11] K. Thenmozhi,et al. Pixel Forefinger for Gray in Color: A Layer by Layer Stego , 2012 .
[12] Walter Bender,et al. Techniques for Data Hiding , 1996, IBM Syst. J..
[13] Francisco Rodríguez-Henríquez,et al. A fast parallel implementation of elliptic curve point multiplication over GF(2m) , 2004, Microprocess. Microsystems.
[14] Máire O'Neill,et al. Rijndael FPGA Implementations Utilising Look-Up Tables , 2003, J. VLSI Signal Process..
[15] M. Anwar Hasan,et al. High performance FPGA based elliptic curve cryptographic co-processor , 2004, International Conference on Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004..
[16] Arshad Aziz,et al. Resource efficient implementation of T-Boxes in AES on Virtex-5 FPGA , 2010, Inf. Process. Lett..
[17] Vipul Gupta,et al. An End-to-End Systems Approach to Elliptic Curve Cryptography , 2002, CHES.
[18] K. Baskaran,et al. An ASIC implementation of low power and high throughput blowfish crypto algorithm , 2010, Microelectron. J..
[19] Zhihua Xia,et al. Steganalysis Based on Difference Statistics for LSB Matching Steganography , 2009 .
[20] Zarinah Mohd Kasirun,et al. On the capacity and security of steganography approaches: An overview , 2010 .
[21] Hun-Chen Chen,et al. A new cryptography system and its VLSI realization , 2003, Journal of systems architecture.
[22] Michalis D. Galanis,et al. 64-bit Block ciphers: hardware implementations and comparison analysis , 2004, Comput. Electr. Eng..
[23] Jean-Jacques Quisquater,et al. Implementation of the AES-128 on Virtex-5 FPGAs , 2008, AFRICACRYPT.
[24] Jean-Jacques Quisquater,et al. High-speed hardware implementations of Elliptic Curve Cryptography: A survey , 2007, J. Syst. Archit..
[25] Ioannis Papaefstathiou,et al. Design-space exploration of the most widely used cryptography algorithms , 2004, Microprocess. Microsystems.
[26] Leon O. Chua,et al. Cryptography based on chaotic systems , 1997 .
[27] R Sundararaman,et al. Stego System on Chip with LFSR based Information Hiding Approach , 2011 .