1 pm MOSFET VLSI Technology: Part lV— Hot-Electron Design Constraints

[1]  B.L. Crowder,et al.  1 /spl mu/m MOSFET VLSI technology. V. A single-level polysilicon technology using electron-beam lithography , 1979, IEEE Journal of Solid-State Circuits.

[2]  R. R. Troutman.  Silicon surface emission of hot electrons , 1978 .

[3]  Tak H. Ning,et al.  High‐field capture of electrons by Coulomb‐attractive centers in silicon dioxide , 1976 .

[4]  E. M. Buturla,et al.  Steady-state analysis of field effect transistors via the finite element method , 1975 .

[5]  T.H. Ning.  Hot-electron emission currents in N-channel IGFET's , 1977, 1977 International Electron Devices Meeting.

[6]  Tak H. Ning,et al.  Electron trapping at positively charged centers in SiO2 , 1975 .

[7]  Peter E. Cottrell,et al.  Hot-electron emission in N-channel IGFET's , 1979 .

[8]  Sura Adil Abbas,et al.  N-channel IGFET design limitations due to hot electron trapping , 1975 .

[9]  Donald R. Young,et al.  Electron trapping in electron‐beam irradiated SiO2 , 1978 .

[10]  J. H. Thomas.  Transient photodepopulation measurements of electron trap distributions in thin SiO2 films on silicon , 1973 .

[11]  Donald R. Young.  Electron current injected into SiO2 from p‐type Si depletion regions , 1976 .

[12]  B.L. Crowder,et al.  1 µm MOSFET VLSI technology: Part V—A single-level polysilicon technology using electron-beam lithography , 1979, IEEE Transactions on Electron Devices.

[13]  J. H. Thomas,et al.  Electron trapping levels in silicon dioxide thermally grown on silicon , 1972 .

[14]  Tak H. Ning,et al.  Emission probability of hot electrons from silicon into silicon dioxide , 1977 .

[15]  S. A. Abbas,et al.  Hot‐carrier instability in IGFET’s , 1975 .

[16]  Tak H. Ning,et al.  Threshold instability in IGFET’s due to emission of leakage electrons from silicon substrate into silicon dioxide , 1976 .

[17]  P.W. Cook,et al.  1 /spl mu/m MOSFET VLSI technology. III. Logic circuit design methodology and applications , 1979, IEEE Journal of Solid-State Circuits.

[18]  R.H. Dennard,et al.  1 /spl mu/m MOSFET VLSI technology. II. Device designs and characteristics for high-performance logic applications , 1979, IEEE Journal of Solid-State Circuits.

[19]  H. Hara,et al.  A New Instability in MOS Transistor Caused by Hot Electron and Hole Injection from Drain Avalanche Plasma into Gate Oxide , 1970 .