Electromigration reliability of tungsten and aluminum vias and improvements under AC current stress

The reliability with respect to electromigration failure of tungsten and aluminum vias under DC, pulse-DC, and AC stressing has been studied using Kelvin test structures. The results indicate that although W-plug vias can eliminate the step coverage problem, this metallization system is not ideal because the intermetallic contact represents an undesirable flux divergence location for electromigration. Al vias are more reliable than W-plug vias with respect to electromigration failure. The unidirectional 50% duty factor pulse-DC lifetime is found to be twice the DC lifetime in the low-frequency region ( 10 kHz). The via lifetimes under bidirectional stressing current are found to be orders of magnitude longer than DC lifetimes under the same stressing current density for both W and Al vias. All the observations are in agreement with a vacancy relaxation model. >

[1]  Jiang Tao,et al.  Comparison of electromigration reliability of tungsten and aluminum vias under DC and time-varying current stressing , 1992, 30th Annual Proceedings Reliability Physics 1992.

[2]  Peng Fang,et al.  Circuit reliability simulator for interconnect, via, and contact electromigration , 1992 .

[3]  Earl L. Parks,et al.  The Distribution of Electromigration Failures , 1986, 24th International Reliability Physics Symposium.

[4]  Electromigration in a two-level Al-Cu interconnection with W studs , 1990, Seventh International IEEE Conference on VLSI Multilevel Interconnection.

[5]  N. Sasaki,et al.  High-aspect-ratio via-hole filling with aluminum melting by excimer laser irradiation for multilevel interconnection , 1987, IEEE Electron Device Letters.

[6]  B. Agarwala,et al.  Dependence of Electromigration‐Induced Failure Time on Length and Width of Aluminum Thin‐Film Conductors , 1970 .

[7]  J. J. Estabil,et al.  Electromigration improvements with titanium underlay and overlay in Al(Cu) metallurgy , 1991, 1991 Proceedings Eighth International IEEE VLSI Multilevel Interconnection Conference.

[8]  Hiroshi Iwai,et al.  Electromigration reliability for a tungsten-filled via hole structure , 1990 .

[9]  The effect of metal thickness on electromigration-induced extrusion shorts in submicron technology , 1991 .

[10]  S.S. Wong,et al.  A selective CVD tungsten local interconnect technology , 1988, Technical Digest., International Electron Devices Meeting.

[11]  Electromigration characteristics of tungsten plug vias under pulse and bidirectional current stressing , 1991, IEEE Electron Device Letters.

[12]  Chenming Hu,et al.  Projecting interconnect electromigration lifetime for arbitrary current waveforms , 1990 .

[13]  J. Komori,et al.  A selective LPCVD tungsten process using silane reduction for VLSI applications , 1990 .

[14]  G. Dixit,et al.  Planarized aluminum metallization for sub-0.5 mu m CMOS technology , 1990, International Technical Digest on Electron Devices.

[15]  J. McPherson,et al.  Via electromigration performance of Ti/W/Al-Cu(2%) multilayered metallization , 1989, Proceedings., Sixth International IEEE VLSI Multilevel Interconnection Conference.