Digital design laboratory

The exponential evolution of digital components and design practices places very high demands on engineering education. The traditional approach, based on gates and standard circuit blocks, in many institutions is being replaced by the introduction of HDL, in order to shorten the distance between the fundamentals and the state-of-the art application of today. We present here an approach that, while providing a solid ground on the basic issues still at gate level, provides a seamless transition toward complex design and HDL. The core is a proprietary simulation suite, the Deeds, tailored precisely on that purpose. Deeds supports, with tools and a wide variety of projects, design, simulation and practical implementation on FPGA of logic networks, integrating different design techniques, from combinational networks, Finite State Machines, microcomputer programming and interfacing, FPGA implementation.