Extraction of Sheet Resistance and Line Width From All-Copper ECD Test Structures Fabricated From Silicon Preforms

Test structures have been fabricated to allow electrical critical dimensions (ECD) to be extracted from copper features with dimensions comparable to those replicated in integrated circuit (IC) interconnect systems. The implementation of these structures is such that no conductive barrier metal has been used. The advantage of this approach is that the electrical measurements provide a nondestructive and efficient method for determining critical dimension (CD) values and for enabling fundamental studies of electron transport in narrow copper features unaffected by the complications of barrier metal films. This paper reports on the results of tests which have been conducted to evaluate various extraction methods for sheet resistance and line width values from the current design.

[1]  M. W. Cresswell,et al.  High-resolution transmission electron microscopy calibration of critical dimension (CD) reference materials , 2001 .

[3]  P. Bendix,et al.  Test chip for electrical linewidth of copper-interconnect features and related parameters , 2001, ICMTS 2001. Proceedings of the 2001 International Conference on Microelectronic Test Structures (Cat. No.01CH37153).

[4]  Anthony J. Walton,et al.  Evaluation of sheet resistance and electrical linewidth measurement techniques for copper damascene interconnect , 2002 .

[5]  L. W. Linholm,et al.  Test structures for referencing electrical linewidth measurements to silicon lattice parameters using HRTEM , 2002, Proceedings of the 2002 International Conference on Microelectronic Test Structures, 2002. ICMTS 2002..

[6]  R. Allen,et al.  A new test structure for the electrical measurement of the width of short features with arbitrarily wide voltage taps , 1992, IEEE Electron Device Letters.

[7]  R. C. Weast CRC Handbook of Chemistry and Physics , 1973 .

[8]  T. Hatsuzawa,et al.  Critical dimension measurements by electron and optical beams for the establishment of linewidth standards , 1992, ICMTS 92 Proceedings of the 1992 International Conference on Microelectronic Test Structures.

[9]  Richard A. Allen,et al.  Recent Developments in Electrical Linewidth and Overlay Metrology for Integrated Circuit Fabrication Processes , 1996 .

[10]  L. J. V. D. Pauw A METHOD OF MEASURING SPECIFIC RESISTIVITY AND HALL EFFECT OF DISCS OF ARBITRARY SHAPE , 1991 .

[12]  Richard A. Allen,et al.  RM 8111: Development of a Prototype Linewidth Standard , 2006, Journal of research of the National Institute of Standards and Technology.

[13]  K. Tobin Handbook of Silicon Semiconductor Metrology TABLE OF CONTENTS 1 , 2022 .