Optimization of trade-offs between efficiency and intermodulation in SSPAs based on experimental and theoretical considerations
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The problem of improving tradeoffs between power added efficiency (PAE) and third-order intermodulation (IM3) in power FETs is examined. Intermodulation and PAE of a commercially available 4-W-power FET have been fully characterized by using an active load pull technique. Significant variations of PAE, IM3, and differential gain compression (DGC) versus bias conditions and load impedances are observed experimentally and confirmed by theoretical nonlinear analysis. The analysis of load lines in the I-V plane of the FET provides a graphical method for optimizing the PAE or IM3 in power amplifiers. Numerical simulations achieved by using the Tajima FET model show a close relation between IM3 and DGC.<<ETX>>
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